Low-power register-exchange survivor memory architectures for Viterbi decoders.
Ming-Der ShiehTai-Ping WangDer-Wei YangPublished in: IET Circuits Devices Syst. (2009)
Keyphrases
- low power
- power reduction
- power consumption
- low cost
- high speed
- power dissipation
- single chip
- high power
- digital signal processing
- logic circuits
- wireless transmission
- vlsi architecture
- vlsi circuits
- decoding algorithm
- low power consumption
- hidden markov models
- gate array
- nm technology
- delay insensitive
- power saving
- image sensor