Tai Ly

Publication Activity (10 Years)

Years Active: 1995-2017
Publications (10 Years): 6

Top Topics

Hardware Implementation

Mass Spectrometry Data

Top Venues

Sarnoff Symposium

Int. J. Reconfigurable Comput.

Publications

Swapnil Mhaske, Hojin Kee, Tai Ly, Ahsan Aziz, Predrag Spasojevic
FPGA-Based Channel Coding Architectures for 5G Wireless Using High-Level Synthesis. Int. J. Reconfigurable Comput. 2017 (2017)
Swapnil Mhaske, Hojin Kee, Tai Ly, Predrag Spasojevic
FPGA-accelerated simulation of a hybrid-ARQ system using high level synthesis. Sarnoff Symposium (2016)
Swapnil Mhaske, Hojin Kee, Tai Ly, Ahsan Aziz, Predrag Spasojevic
High-Throughput FPGA-Based QC-LDPC Decoder Architecture. VTC Fall (2015)
Swapnil Mhaske, David Uliana, Hojin Kee, Tai Ly, Ahsan Aziz, Predrag Spasojevic
A 2.48Gb/s QC-LDPC Decoder Implementation on the NI USRP-2953R. CoRR (2015)
Swapnil Mhaske, David Uliana, Hojin Kee, Tai Ly, Ahsan Aziz, Predrag Spasojevic
A 2.48Gb/s FPGA-based QC-LDPC decoder: An algorithmic compiler implementation. Sarnoff Symposium (2015)
Swapnil Mhaske, Hojin Kee, Tai Ly, Ahsan Aziz, Predrag Spasojevic
High-Throughput FPGA-based QC-LDPC Decoder Architecture. CoRR (2015)
Hojin Kee, Swapnil Mhaske, David Uliana, Adam Arnesen, Newton Petersen, Taylor L. Riché, Dustyn Blasig, Tai Ly
Rapid and high-level constraint-driven prototyping using lab VIEW FPGA. GlobalSIP (2014)
Yang Sun, Joseph R. Cavallaro, Tai Ly
Scalable and low power LDPC decoder design using high level algorithmic synthesis. SoCC (2009)
Tai Ly, David Knapp, Ron Miller, Don MacMillen
Scheduling Using Behavioral Templates. DAC (1995)
David Knapp, Tai Ly, Don MacMillen, Ron Miller
Behavioral Synthesis Methodology for HDL-Based Specification and Validation. DAC (1995)