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Sungphil Choi
ORCID
Publication Activity (10 Years)
Years Active: 2018-2023
Publications (10 Years): 6
Top Topics
Memory Space
Computing Environments
Multipath
Decision Feedback
Top Venues
IEEE Trans. Circuits Syst. I Regul. Pap.
IEEE Trans. Circuits Syst. II Express Briefs
ISLPED
IEEE Access
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Publications
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Yong-Un Jeong
,
Sungphil Choi
,
Suhwan Kim
,
Joo-Hyung Chae
Single-Ended Receiver-Side Crosstalk Cancellation With Independent Gain and Timing Control for Minimum Residual FEXT.
IEEE Trans. Circuits Syst. I Regul. Pap.
70 (12) (2023)
Yong-Un Jeong
,
Sungphil Choi
,
Joo-Hyung Chae
,
Jaekwang Yun
,
Shin-Hyun Jeong
,
Suhwan Kim
A 10 Gb/s/pin Single-Ended Transmitter With Reflection-Aided Duobinary Modulation for Dual-Rank Mobile Memory Interfaces.
IEEE Trans. Circuits Syst. I Regul. Pap.
69 (3) (2022)
Sungphil Choi
,
Yong-Un Jeong
,
Joo-Hyung Chae
,
Shin-Hyun Jeong
,
Suhwan Kim
A Differentiating Receiver With a Transition-Detecting DFE for Dual-Rank Mobile Memory Interface.
IEEE Access
9 (2021)
Joo-Hyung Chae
,
Minchang Kim
,
Sungphil Choi
,
Suhwan Kim
A 10.4-Gb/s 1-Tap Decision Feedback Equalizer With Different Pull-Up and Pull-Down Tap Weights for Asymmetric Memory Interfaces.
IEEE Trans. Circuits Syst. II Express Briefs
(2) (2020)
Yong-Un Jeong
,
Joo-Hyung Chae
,
Sungphil Choi
,
Jaekwang Yun
,
Shin-Hyun Jeong
,
Suhwan Kim
A Low-Power and Low-Noise 20: 1 Serializer with Two Calibration Loops in 55-nm CMOS.
ISLPED
(2019)
Mino Kim
,
Joo-Hyung Chae
,
Sungphil Choi
,
Gi-Moon Hong
,
Hyeongjun Ko
,
Deog-Kyoon Jeong
,
Suhwan Kim
A 4266 Mb/s/pin LPDDR4 Interface With An Asynchronous Feedback CTLE and An Adaptive 3-Step Eye Detection Algorithm for Memory Controller.
IEEE Trans. Circuits Syst. II Express Briefs
(12) (2018)