Sudipta Paul

Publication Activity (10 Years)

Years Active: 2015-2023
Publications (10 Years): 5

Top Topics

Top Venues

IET Circuits Devices Syst.

Publications

Sudipta Paul, Tridib Mukherjee, Pritha Banerjee, Susmita Sur-Kolay
Concurrent Steiner Tree Selection for Global routing with EUVL Flare Reduction. Integr. 92 (2023)
Kritanta Saha, Sudipta Paul, Pritha Banerjee, Susmita Sur-Kolay
Stitch-avoiding Global Routing for Multiple E-Beam Lithography. VLSID (2022)
Sudipta Paul, Pritha Banerjee, Susmita Sur-Kolay
A study on flare minimisation in EUV lithography by post-layout re-allocation of wire segments. IET Circuits Devices Syst. 15 (4) (2021)
Sudipta Paul, Pritha Banerjee, Susmita Sur-Kolay
Minimization of Flare in EUVL by Simultaneous Wire Segment Perturbation and Dummification. ISVLSI (2019)
Sudipta Paul, Pritha Banerjee, Susmita Sur-Kolay
Post-Layout Perturbation towards Stitch Friendly Layout for Multiple E-Beam Lithography. ICCD (2017)
Sudipta Paul, Pritha Banerjee, Susmita Sur-Kolay
Flare reduction in EUV Lithography by perturbation of wire segments. VLSI-SoC (2015)