Steffen Zeidler

Publication Activity (10 Years)

Years Active: 2009-2021
Publications (10 Years): 8

Top Venues

IEEE Trans. Circuits Syst. I Regul. Pap.

DDECS

DSD

ICECS

Brandenburg University of Technology (PHD)

Education History

Brandenburg University of Technology

PHD

Publications

Oliver Schrape, Anselm Breitenreiter, Carsten Schulze, Steffen Zeidler, Milos Krstic
Radiation-Hardness-by-Design Latch-based Triple Modular Redundancy Flip-Flops. LASCAS (2021)
Oliver Schrape, Marko S. Andjelkovic, Anselm Breitenreiter, Steffen Zeidler, Alexey Balashov, Milos Krstic
Design and Evaluation of Radiation-Hardened Standard Cell Flip-Flops. IEEE Trans. Circuits Syst. I Regul. Pap. 68 (11) (2021)
Steffen Zeidler, Oliver Schrape, Anselm Breitenreiter, Milos Krstic
A Glitch-free Clock Multiplexer for Non-Continuously Running Clocks. DSD (2020)
Oliver Schrape, Anselm Breitenreiter, Steffen Zeidler, Milos Krstic
Aspects on Timing Modeling of Radiation-Hardness by Design Standard Cell-Based △TMR Flip-Flops. DSD (2019)
Anselm Breitenreiter, Stefan Weidling, Oliver Schrape, Steffen Zeidler, Pedro Reviriego, Milos Krstic
Selective Fault Tolerance by Counting Gates with Controlling Value. IOLTS (2019)
Xin Fan, Mikkel B. Stegmann, Oliver Schrape, Steffen Zeidler, Isac G. Jensen, Jannich Thorsen, Tobias Bjerregaard, Milos Krstic
Frequency-Domain Optimization of Digital Switching Noise Based on Clock Scheduling. IEEE Trans. Circuits Syst. I Regul. Pap. (7) (2016)
Steffen Zeidler, Xin Fan, Oliver Schrape, Milos Krstic
An Early Stage Design Flow for Switching Noise Attenuation. J. Circuits Syst. Comput. 25 (3) (2016)
Milan Babic, Steffen Zeidler, Milos Krstic
GALS Partitioning Methodology for Substrate Noise Reduction in Mixed-Signal Integrated Circuits. ASYNC (2016)
Steffen Zeidler, Xin Fan, Oliver Schrape, Milos Krstic
A Design Preconditioning Flow for Low-Noise Circuits. DDECS (2015)
Steffen Zeidler, Milos Krstic
A survey about testing asynchronous circuits. ECCTD (2015)
Steffen Zeidler, Michael Goderbauer, Milos Krstic
Design of a low-power asynchronous elliptic curve cryptography coprocessor. ICECS (2013)
Eckhard Grass, Milos Krstic, Xin Fan, Steffen Zeidler
Asynchronous circuit design: From basics to practical applications. DDECS (2012)
Steffen Zeidler, Christoph Wolf, Milos Krstic, Rolf Kraemer
Functional Pattern Generation for Asynchronous Designs in a Test Processor Environment. Asian Test Symposium (2012)
Christoph Wolf, Steffen Zeidler, Milos Krstic, Rolf Kraemer
Overview on ATE Test and Debugging Methods for Asynchronous Circuits. MTV (2011)
Steffen Zeidler, Christoph Wolf, Milos Krstic, Frank Vater, Rolf Kraemer
Design of a Test Processor for Asynchronous Chip Test. Asian Test Symposium (2011)
Oliver Schrape, Frank Winkler, Steffen Zeidler, Markus Petri, Eckhard Grass, Ulrich Jagdhold
An All-Digital Phase-Locked Loop with High Resolution for Local On-Chip Clock Synthesis. PATMOS (2010)
Steffen Zeidler, Alexandre V. Bystrov, Milos Krstic, Rolf Kraemer
On-line testing of bundled-data asynchronous handshake protocols. IOLTS (2010)
Steffen Zeidler, Marcus Ehrig, Milos Krstic, Michael Augustin, Christoph Wolf, Rolf Kraemer
Ultra low cost asynchronous handshake checker. IOLTS (2009)

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Publication Activity (10 Years)

Top Topics

Top Venues

Steffen Zeidler