Design of a low-power asynchronous elliptic curve cryptography coprocessor.

Steffen Zeidler Michael Goderbauer Milos Krstic

Published in: ICECS (2013)

Keyphrases

low power
single chip
low cost
power consumption
high speed
logic circuits
low power consumption
vlsi architecture
digital signal processing
cmos technology
delay insensitive
ultra low power
power dissipation
mixed signal
gate array