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Ulrich Jagdhold
Publication Activity (10 Years)
Years Active: 2001-2010
Publications (10 Years): 0
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Publications
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Oliver Schrape
,
Frank Winkler
,
Steffen Zeidler
,
Markus Petri
,
Eckhard Grass
,
Ulrich Jagdhold
An All-Digital Phase-Locked Loop with High Resolution for Local On-Chip Clock Synthesis.
PATMOS
(2010)
Frank Winkler
,
Gerald Kell
,
Oliver Schrape
,
Hans Gustat
,
Ulrich Jagdhold
HDL-Synthese und Simulation von Hochgeschwindigkeits-Digitalschaltungen mit gemischten CMOS- und ECL-Bibliotheken.
MBMV
(2009)
Alfonso Troya
,
Koushik Maharatna
,
Milos Krstic
,
Eckhard Grass
,
Ulrich Jagdhold
,
Rolf Kraemer
Low-Power VLSI Implementation of the Inner Receiver for OFDM-Based WLAN Systems.
IEEE Trans. Circuits Syst. I Regul. Pap.
(2) (2008)
Alfonso Troya
,
Koushik Maharatna
,
Milos Krstic
,
Eckhard Grass
,
Ulrich Jagdhold
,
Rolf Kraemer
Efficient Inner Receiver Design for OFDM-Based WLAN Systems: Algorithm and Architecture.
IEEE Trans. Wirel. Commun.
6 (4) (2007)
Koushik Maharatna
,
Alfonso Troya
,
Milos Krstic
,
Eckhard Grass
,
Ulrich Jagdhold
A CORDIC like processor for computation of arctangent and absolute magnitude of a vector.
ISCAS (2)
(2004)
Koushik Maharatna
,
Eckhard Grass
,
Ulrich Jagdhold
A 64-point Fourier transform chip for high-speed wireless LAN application using OFDM.
IEEE J. Solid State Circuits
39 (3) (2004)
Koushik Maharatna
,
Eckhard Grass
,
Ulrich Jagdhold
A novel 64-point FF/IFFT processor for IEEE 802.11(a) standard.
ICASSP (2)
(2003)
Eckhard Grass
,
Klaus Tittelbach-Helmrich
,
Ulrich Jagdhold
,
Alfonso Troya
,
Gunther Lippert
,
Olaf Krüger
,
Jens Lehmann
,
Koushik Maharatna
,
Kai F. Dombrowski
,
Norbert Fiebig
,
Rolf Kraemer
,
Petri Mähönen
On the single-chip implementation of a Hiperlan/2 and IEEE 802.11a capable modem.
IEEE Wirel. Commun.
8 (6) (2001)