Shih-Nung Wei

Publication Activity (10 Years)

Years Active: 2012-2018
Publications (10 Years): 2

Top Topics

Comparative Study

Error Resilient

Top Venues

IEEE Trans. Very Large Scale Integr. Syst.

Publications

Chien-Tung Liu, Zhe-Wei Chang, Shih-Nung Wei, Jinn-Shyan Wang, Tay-Jyi Lin
A Low-Area, Low-Power, and Low-Leakage Error-Detecting Latch for Timing-Error Resilient System Designs. SoCC (2018)
Jinn-Shyan Wang, Shih-Nung Wei
Process/Voltage/Temperature-Variation-Aware Design and Comparative Study of Transition-Detector-Based Error-Detecting Latches for Timing-Error-Resilient Pipelined Systems. IEEE Trans. Very Large Scale Integr. Syst. 25 (10) (2017)
Yi-Ming Wang, Shih-Nung Wei
Range Unlimited Delay-Interleaving and -Recycling Clock Skew Compensation and Duty-Cycle Correction Circuit. IEEE Trans. Very Large Scale Integr. Syst. 23 (5) (2015)
Shih-Nung Wei, Yi-Ming Wang, Jyun-Hua Peng
An output tracking delay-recycled clock skew-compensation and/or duty-cycle-correction circuit. ISCAS (2012)
Shih-Nung Wei, Yi-Ming Wang, Jyun-Hua Peng, Yuandi Surya
A range extending delay-recycled clock skew-compensation and/or duty-cycle-correction circuit. VLSI-DAT (2012)