Shigeto Tanaka

Publication Activity (10 Years)

Years Active: 2005-2007
Publications (10 Years): 0

Publications

Hiroki Sakurai, Shigeto Tanaka, Yasuhiro Sugimoto
A Digitally Assisted Gain and Offset Error Cancellation Technique for a CMOS Pipelined ADC with a 1.5-bit Bit-Block Architecture. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (10) (2007)
Yasuhiro Sugimoto, Yuji Gohda, Shigeto Tanaka
A Study to Realize a CMOS Pipelined Current-Mode A-to-D Converter for Video Applications. IEICE Trans. Electron. (6) (2006)
Shigeto Tanaka, Yuji Gohda, Yasuhiro Sugimoto
The realization of a mismatch-free and 1.5-bit over-sampling pipelined ADC. ISCAS (6) (2005)