Sergey Ostanin

Publication Activity (10 Years)

Years Active: 2000-2018
Publications (10 Years): 8

Top Topics

Bi Decomposition

Monotone Boolean Functions

Top Venues

Publications

Anzhela Yu. Matrosova, Sergey Ostanin
Trojan circuits masking and debugging of combinational circuits with LUT insertion. AQTR (2018)
Sergey Ostanin, Valentina Andreeva, Natalia Butorina, D. Tretyakov
Fault-Tolerant Synchronous FSM Network Design for Path Delay Faults. EWDTS (2018)
Sergey Ostanin
Self-checking synchronous FSM network design for path delay faults. EWDTS (2017)
Anzhela Yu. Matrosova, Sergey Ostanin, D. Tretyakov, Natalia Butorina
Logic circuit design with gates, LUTs and MUXs oriented to mask faults. EWDTS (2017)
Anzhela Yu. Matrosova, Eugeniy Mitrofanov, Sergey Ostanin, Ekaterina Nikolaeva
Detection and masking of Trojan Circuits in sequential logic. EWDTS (2017)
Anzhela Yu. Matrosova, Sergey Ostanin, Irina Kirienko, Ekaterina Nikolaeva
A fault-tolerant sequential circuit design for SAFs and PDFs soft errors. IOLTS (2016)
Anjela Yu. Matrosova, Sergey Ostanin, Valentina Andreeva
Patching circuit design based on reserved CLBs. AQTR (2016)
Sergey Ostanin, Anzhela Yu. Matrosova, Natalia Butorina, V. Lavrov
A fault-tolerant sequential circuit design for soft errors based on fault-secure circuit. EWDTS (2016)
Anzhela Yu. Matrosova, Sergey Ostanin, Irina Kirienko, Ekaterina Nikolaeva
Fault-tolerant high performance scheme design. EWDTS (2015)
Sergey Ostanin, Irina Kirienko, V. Lavrov
A fault-tolerant combinational circuit design. EWDTS (2015)
Anzhela Yu. Matrosova, Sergey Ostanin, Irina Kirienko
Increasing Manufacturing Yield Using Partially Programmable Circuits with CLB Implementation of Incompletely Specified Boolean Function of the Corresponding Sub-Circuit. DDECS (2015)
Anzhela Yu. Matrosova, Sergey Ostanin, Irina Kirienko, Virendra Singh
Partially programmable circuit design. EWDTS (2014)
Anzhela Yu. Matrosova, Sergey Ostanin, Alexey Melnikov, Virendra Singh
Observability calculation of state variable oriented to robust PDFs and LOC or LOS techniques. EWDTS (2013)
Sergey Ostanin
Testable combinational circuit design based on free ZDD-implementation of irredundant SOPof Boolean function. EWDTS (2013)
Natalia Butorina, Sergey Ostanin
Implementation by the special formula of an arbitrary subset of code words of (m, n)-code for designing a self-testing checker. EWDTS (2011)
Sergey Ostanin, R. Muchamedov
Testable combinational circuit design based on ZDD-implementation of ISOP Boolean function. EWDTS (2010)
Ilya Levin, Vladimir Ostrovsky, Sergey Ostanin, Mark G. Karpovsky
Self-checking sequential circuits with self-healing ability. ACM Great Lakes Symposium on VLSI (2002)
Ilya Levin, Vladimir Sinelnikov, Mark G. Karpovsky, Sergey Ostanin
Sequential Circuits Applicable for Detecting Different Types of Faults. IOLTW (2002)
Anzhela Yu. Matrosova, Sergey Ostanin, Ilya Levin
Survivable Self-Checking Sequential Circuits. DFT (2001)
Anzhela Yu. Matrosova, Ilya Levin, Sergey Ostanin
Self-checking Synchronous FSM Network Design with Low Overhead. VLSI Design 2000 (1) (2000)
Anzhela Yu. Matrosova, Sergey Ostanin
Self-Checking FSM Design with Observing only FSM Outputs. IOLTW (2000)