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Sébastien Rieubon
Publication Activity (10 Years)
Years Active: 2010-2018
Publications (10 Years): 2
Top Topics
High Levels
Analog Vlsi
Circuit Design
Decomposition Methods
Top Venues
DCIS
ISCAS
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Publications
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Oussama Elissati
,
Assia El-Hadbi
,
Abdelkarim Cherkaoui
,
Sébastien Rieubon
,
Laurent Fesquet
Low Phase-Noise CMOS Quadrature Oscillator based on (N × 4)-stage Self-Timed Ring.
DCIS
(2018)
Klodjan Bidaj
,
Jean-Baptiste Begueret
,
Nabil Houdali
,
Jerome Deroo
,
Sébastien Rieubon
Time-domain PLL modeling and RJ/DJ jitter decomposition.
ISCAS
(2016)
Oussama Elissati
,
Eslam Yahya
,
Sébastien Rieubon
,
Laurent Fesquet
Optimizing and Comparing CMOS Implementations of the C-Element in 65nm Technology: Self-Timed Ring Case.
PATMOS
(2010)
Oussama Elissati
,
Sébastien Rieubon
,
Eslam Yahya
,
Laurent Fesquet
Self-Timed Rings: A Promising Solution for Generating High-Speed High-Resolution Low-Phase Noise Clocks.
VLSI-SoC (Selected Papers)
(2010)
Oussama Elissati
,
Eslam Yahya
,
Sébastien Rieubon
,
Laurent Fesquet
A high-speed high-resolution low-phase noise oscillator using self-timed rings.
VLSI-SoC
(2010)