Login / Signup

Optimizing and Comparing CMOS Implementations of the C-Element in 65nm Technology: Self-Timed Ring Case.

Oussama ElissatiEslam YahyaSébastien RieubonLaurent Fesquet
Published in: PATMOS (2010)
Keyphrases
  • nm technology
  • low power
  • power consumption
  • low cost
  • high speed
  • single chip
  • image analysis
  • power dissipation
  • case study
  • image sensor
  • high bandwidth