Satyajit Mohapatra

Publication Activity (10 Years)

Years Active: 2016-2024
Publications (10 Years): 15

Top Topics

Error Compensation

Analog To Digital Converter

Top Venues

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

Publications

Satyajit Mohapatra, Sanjeet Kumar Nayak
Re-Max: A Reward Maximization Approach for Heterogeneous Drone Scheduling Problem. ICDCN (2024)
Satyajit Mohapatra, Sanjeet Kumar Nayak
Greedy Algorithms for Heterogeneous Drone Delivery Packing in the Cloud-assisted Intelligent Transportation System. COMSNETS (2024)
Bhaskar Rongali, Satyajit Mohapatra, Sanjeet Kumar Nayak
A Secure Contactless Payment System with Bidirectional Blockchain and Blake Hash Function. TrustCom (2023)
Christian D. Newman, Michael John Decker, Reem S. Alsuhaibani, Anthony Peruma, Mohamed Wiem Mkaouer, Satyajit Mohapatra, Tejal Vishnoi, Marcos Zampieri, Timothy J. Sheldon, Emily Hill
An Ensemble Approach for Annotating Source Code Identifiers With Part-of-Speech Tags. IEEE Trans. Software Eng. 48 (9) (2022)
Satyajit Mohapatra, Nihar Ranjan Mohapatra
Dispersion in Placement: Quantification and Insights. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (8) (2022)
Christian D. Newman, Michael John Decker, Reem S. Alsuhaibani, Anthony Peruma, Satyajit Mohapatra, Tejal Vishnoi, Marcos Zampieri, Mohamed Wiem Mkaouer, Timothy J. Sheldon, Emily Hill
An Ensemble Approach for Annotating Source Code Identifiers with Part-of-speech Tags. CoRR (2021)
Satyajit Mohapatra, Nihar Ranjan Mohapatra
The Design of Ultra Low Power SAR ADC for Implantable Cardioverter Defibrillator (ICD). VLSI Design (2020)
Satyajit Mohapatra, Nihar Ranjan Mohapatra
Gradient Error Compensation in SC-MDACs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (12) (2020)
Satyajit Mohapatra, Hari Shanker Gupta, Nihar Ranjan Mohapatra, Sanjeev Mehta, Arup Roy Chowdhury, Nisha Pandya
A Mismatch Resilient 16-Bit 20 MS/s Pipelined ADC. VLSI Design (2019)
Yadukrishnan Mekkattillam, Satyajit Mohapatra, Nihar R. Mohapatra
Design and Calibration of 14-bit 10 KS/s Low Power SAR ADC for Bio-medical Applications. VDAT (2019)
Satyajit Mohapatra, Hari Shanker Gupta, Nihar Ranjan Mohapatra
Mismatch Resilient 3.5-Bit MDAC with MCS-CFCS. ISVLSI (2018)
Satyajit Mohapatra, Nihar Ranjan Mohapatra
The HotSpot Compensation in High Speed Data Converters. MWSCAS (2018)
Satyajit Mohapatra, Hari Shanker Gupta, Jatindeep Singh, Nihar Ranjan Mohapatra
A 64b/66b Line Encoding for High Speed Serializers. VLSI Design (2017)
Jatindeep Singh, Satyajit Mohapatra, Nihar Ranjan Mohapatra
Performance Optimized 64b/66b Line Encoding Technique for High Speed SERDES Devices. VDAT (2017)
Hari Shanker Gupta, Satyajit Mohapatra, Nihar R. Mohapatra, Dinesh Kumar Sharma
Novel design of a silicon photodetector and its integration in a 4×4 CMOS pixel array. ISQED (2016)