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A Mismatch Resilient 16-Bit 20 MS/s Pipelined ADC.
Satyajit Mohapatra
Hari Shanker Gupta
Nihar Ranjan Mohapatra
Sanjeev Mehta
Arup Roy Chowdhury
Nisha Pandya
Published in:
VLSI Design (2019)
Keyphrases
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analog to digital converter
data flow
multiple sclerosis
database
data sets
low power
bit vector
pac man
instruction set architecture
real time
information retrieval
low cost
block cipher
magnetic tape
random number generator