Satoshi Jo

Publication Activity (10 Years)

Years Active: 2012-2014
Publications (10 Years): 0

Top Topics

Bounded Model Checking

Asynchronous Circuits

Advanced Features

Top Venues

IPSJ Trans. Syst. LSI Des. Methodol.

Publications

Satoshi Jo, Takeshi Matsumoto, Masahiro Fujita
SAT-based Automatic Rectification and Debugging of Combinational Circuits with LUT Insertions. IPSJ Trans. Syst. LSI Des. Methodol. 7 (2014)
Masahiro Fujita, Takeshi Matsumoto, Satoshi Jo
FOF: Functionally Observable Fault and its ATPG techniques. VLSI-SoC (2013)
Masahiro Fujita, Satoshi Jo, Shohei Ono, Takeshi Matsumoto
Partial synthesis through sampling with and without specification. ICCAD (2013)
Satoshi Jo, Amir Masoud Gharehbaghi, Takeshi Matsumoto, Masahiro Fujita
Rectification of advanced microprocessors without changing routing on FPGAs (abstract only). FPGA (2013)
Satoshi Jo, Amir Masoud Gharehbaghi, Takeshi Matsumoto, Masahiro Fujita
Debugging processors with advanced features by reprogramming LUTs on FPGA. FPT (2013)
Satoshi Jo, Takeshi Matsumoto, Masahiro Fujita
SAT-Based Automatic Rectification and Debugging of Combinational Circuits with LUT Insertions. Asian Test Symposium (2012)