Santanu Dutta

Publication Activity (10 Years)

Years Active: 1989-2019
Publications (10 Years): 4

Top Topics

Nonparametric Estimation

Top Venues

Commun. Stat. Simul. Comput.

J. Multivar. Anal.

Publications

Dunmin Zheng, Santanu Dutta
Adaptive Beamforming for Mobile Satellite Systems Based on User Location/Waveform. VTC Fall (2019)
Santanu Dutta, Suparna Biswas
Nonparametric estimation of 100(1 - p)% expected shortfall: p → 0 as sample size is increased. Commun. Stat. Simul. Comput. 47 (2) (2018)
Santanu Dutta, Suparna Biswas
Extreme quantile estimation based on financial time series. Commun. Stat. Simul. Comput. 46 (6) (2017)
Santanu Dutta
Cross-validation Revisited. Commun. Stat. Simul. Comput. 45 (2) (2016)
Santanu Dutta
Local Smoothing for Kernel Distribution Function Estimation. Commun. Stat. Simul. Comput. 44 (4) (2015)
Santanu Dutta
Local Smoothing Using the Bootstrap. Commun. Stat. Simul. Comput. 43 (2) (2014)
Subir Ghosh, Santanu Dutta
Robustness of designs for model discrimination. J. Multivar. Anal. 115 (2013)
Arif Ansari, Santanu Dutta, Michael Tseytlin
S-WiMAX: adaptation of IEEE 802.16e for mobile satellite services. IEEE Commun. Mag. 47 (6) (2009)
Santanu Dutta
Recent Trends in the Design of Video Signal Processing IPS and Multimedia SoCs. SECRYPT (2007)
Balaji Raman, Samarjit Chakraborty, Wei Tsang Ooi, Santanu Dutta
Reducing Data-Memory Footprint of Multimedia Applications by Delay Redistribution. DAC (2007)
Santanu Dutta
Design of Multimillion-Gate Multimedia SoCs: Where do we stand? ESTIMedia (2005)
Santanu Dutta
Architecture and Implementation of Multi-Processor SoCs for Advanced Set-Top Box and Digital TV Systems. SBCCI (2003)
Santanu Dutta
Architecture and design of NX-2700: a programmable single-chip HDTV all-format-decode-and-display processor. IEEE Trans. Very Large Scale Integr. Syst. 9 (2) (2001)
Santanu Dutta, Rune Jensen, Alf Rieckmann
Viper: A Multiprocessor SOC for Advanced Set-Top Box and Digital TV Systems. IEEE Des. Test Comput. 18 (5) (2001)
Santanu Dutta
Design verification of an 18-million-transistor digital television and media processor chip. ICECS (2001)
Santanu Dutta, Deepak Singh, Essam Abu-Ghoush, Vijay Mehra
Architecture and Implementation of a High-Definition Video Co-Processor for Digital Television Applications. VLSI Design (2000)
Santanu Dutta
Architecture, Design, and Verification of an 18 Million Transistor Digital Television and Media Processor Chip. PATMOS (2000)
Santanu Dutta, Vijay Mehra, Weiwen Zhu, Deepak Singh, Marcel Janssens, Ramakrishna Vengalasetti, Boaz Ben-Nun, Pardha Pothana, Venkat Adusumilli, Nahid King, John Yen-Han Huang, Lie Ling, Chris Nelson, Jai Bannur, Sarah Wu
Architecture and design of a Talisman-compatible multimedia processor. IEEE Trans. Circuits Syst. Video Technol. 9 (4) (1999)
Santanu Dutta, Wayne H. Wolf
A circuit-driven design methodology for video signal-processing datapath elements. IEEE Trans. Very Large Scale Integr. Syst. 7 (2) (1999)
Santanu Dutta, Wayne H. Wolf, Andrew Wolfe
A methodology to evaluate memory architecture design tradeoffs for video signal processors. IEEE Trans. Circuits Syst. Video Technol. 8 (1) (1998)
Santanu Dutta, Kevin J. O'Connor, Wayne H. Wolf, Andrew Wolfe
A design study of a 0.25-μm video signal processor. IEEE Trans. Circuits Syst. Video Technol. 8 (4) (1998)
Andrew Wolfe, Jason Fritts, Santanu Dutta, Edil S. T. Fernandes
Datapath Design for a VLIW Video Signal Processor. HPCA (1997)
Santanu Dutta, Wayne H. Wolf
A flexible parallel architecture adapted to block-matching motion-estimation algorithms. IEEE Trans. Circuits Syst. Video Technol. 6 (1) (1996)
Santanu Dutta, Wayne H. Wolf, Andrew Wolfe
VLSI issues in memory-system design for video signal processors. ICCD (1995)
Santanu Dutta, Wayne H. Wolf
Asymptotic limits of video signal processing architectures. IEEE Trans. Circuits Syst. Video Technol. 5 (6) (1995)
Santanu Dutta, Shivaling S. Mahant-Shetti, Stephen L. Lusky
A comprehensive delay model for CMOS inverters. IEEE J. Solid State Circuits 30 (8) (1995)
Santanu Dutta, Sudip Nag, Kaushik Roy
ASAP: A Transistor Sizing Tool for Speed Area and Power Optimization of Static CMOS Circuits. ISCAS (1994)
Santanu Dutta, Wayne H. Wolf
Asymptotic Limits of Video Signal Processing Architectures. ICCD (1994)
Kaushik Roy, Sudip Nag, Santanu Dutta
Channel Architecture Optimization for Performance and Routability of Row-Based FPGAs. ICCD (1993)
Douglas R. Holberg, Santanu Dutta, Lawrence T. Pillage
DC Parameterized Piecewise-Function Transistor Models for Bipolar and MOS Logic Stage Delay Evaluation. ICCAD (1990)
Hau-Yung Chen, Santanu Dutta
A timing model for static CMOS gates. ICCAD (1989)