S. Balamurugan

Publication Activity (10 Years)

Years Active: 2012-2023
Publications (10 Years): 9

Top Topics

Reliability Analysis

Security Threats

Top Venues

Int. J. Circuit Theory Appl.

Int. J. Comput. Aided Eng. Technol.

J. Ambient Intell. Humaniz. Comput.

Publications

Saikumar Bairabathina, S. Balamurugan
Design, prototype validation, and reliability analysis of a multi-input DC/DC converter for grid-independent hybrid electric vehicles. Int. J. Circuit Theory Appl. 51 (5) (2023)
Paramanand Prajapati, S. Balamurugan
Leveraging GaN for DC-DC Power Modules for Efficient EVs: A Review. IEEE Access 11 (2023)
Aakash Choudhury, Arjav Choudhury, Umashankar Subramanium, S. Balamurugan
HealthSaver: a neural network based hospital recommendation system framework on flask webapplication with realtime database and RFID based attendance system. J. Ambient Intell. Humaniz. Comput. 13 (10) (2022)
Gowthamaraj Rajendran, R. S. Ragul Nivash, Purushotham Parthiban Parthy, S. Balamurugan
Modern security threats in the Internet of Things (IoT): Attacks and Countermeasures. ICCST (2019)
Shantanu Agarwal, G. Harish, S. Balamurugan, R. Marimuthu
Design of High Speed 5: 2 and 7: 2 Compressor Using Nanomagnetic Logic. VDAT (2018)
R. Marimuthu, S. Balamurugan, Partha Sharathi Mallick
Design of 5-3 multicolumn compressor for high performance multiplier. Int. J. Comput. Aided Eng. Technol. 10 (5) (2018)
Saurabh Kumar, R. Marimuthu, S. Balamurugan
Design and Analysis of 4-Bit Squarer Circuit Using Minority and Majority Logic in MagCAD. SocProS (2) (2018)
Raunak R. Lahoti, Shantanu Agarwal, S. Balamurugan, R. Marimuthu
Realization of 2-D DCT Using Adder Compressor. SocProS (2) (2018)
S. Balamurugan, Partha Sharathi Mallick
Error Compensation Techniques for Fixed-Width Array Multiplier Design - A Technical Survey. J. Circuits Syst. Comput. 26 (3) (2017)
S. Balamurugan, Sneha Ghosh, Atul, Balakumaran Srirangaswamy, R. Marimuthu, Partha Sharathi Mallick
Design of low power fixed-width multiplier with row bypassing. IEICE Electron. Express 9 (20) (2012)
S. Balamurugan, Balakumaran Srirangaswamy, R. Marimuthu, Partha Sharathi Mallick
FPGA design and implementation of truncated multipliers using bypassing technique. ICACCI (2012)