Rui Policarpo Duarte

Publication Activity (10 Years)

Years Active: 2008-2023
Publications (10 Years): 24

Top Topics

Convolutional Neural Networks

Top Venues

Publications

Maria Inês Frutuoso, Horácio C. Neto, Mário P. Véstias, Rui Policarpo Duarte
Energy-Efficient and Real-Time Wearable for Wellbeing-Monitoring IoT System Based on SoC-FPGA. Algorithms 16 (3) (2023)
Mário P. Véstias, Rui Policarpo Duarte, José T. de Sousa, Horácio C. Neto
Efficient Design of Low Bitwidth Convolutional Neural Networks on FPGA with Optimized Dot Product Units. ACM Trans. Reconfigurable Technol. Syst. 16 (1) (2023)
David Mota, Helena Cruz, Pedro R. Miranda, Rui Policarpo Duarte, José T. de Sousa, Horácio C. Neto, Mário P. Véstias
Onboard Processing of Synthetic Aperture Radar Backprojection Algorithm in FPGA. IEEE J. Sel. Top. Appl. Earth Obs. Remote. Sens. 15 (2022)
Helena Cruz, Mário P. Véstias, José Monteiro, Horácio C. Neto, Rui Policarpo Duarte
A Review of Synthetic-Aperture Radar Image Formation Algorithms and Implementations: A Computational Perspective. Remote. Sens. 14 (5) (2022)
Pedro R. Miranda, Daniel Pestana, João D. Lopes, Rui Policarpo Duarte, Mário P. Véstias, Horácio C. Neto, José T. de Sousa
Configurable Hardware Core for IoT Object Detection. Future Internet 13 (11) (2021)
Daniel Pestana, Pedro R. Miranda, João D. Lopes, Rui Policarpo Duarte, Mário P. Véstias, Horácio C. Neto, José T. de Sousa
A Full Featured Configurable Accelerator for Object Detection With YOLO. IEEE Access 9 (2021)
Mário P. Véstias, Rui Policarpo Duarte, José T. de Sousa, Horácio C. Neto
A Configurable Architecture for Running Hybrid Convolutional Neural Networks in Low-Density FPGAs. IEEE Access 8 (2020)
Mário P. Véstias, Rui Policarpo Duarte, José T. de Sousa, Horácio C. Neto
A fast and scalable architecture to run convolutional neural networks in low density FPGAs. Microprocess. Microsystems 77 (2020)
Mário P. Véstias, Rui Policarpo Duarte, José T. de Sousa, Horácio C. Neto
Moving Deep Learning to the Edge. Algorithms 13 (5) (2020)
Rui Policarpo Duarte, Helena Cruz, Horácio C. Neto
Reconfigurable Accelerator for On-Board SAR Imaging Using the Backprojection Algorithm. ARC (2020)
Luís Fiolhais, Fernando M. Gonçalves, Rui Policarpo Duarte, Mário P. Véstias, José T. de Sousa
Low Energy Heterogeneous Computing with Multiple RISC-V and CGRA Cores. ISCAS (2019)
Helena Cruz, Rui Policarpo Duarte, Horácio C. Neto
Fault-Tolerant Architecture for On-board Dual-Core Synthetic-Aperture Radar Imaging. ARC (2019)
Mário P. Véstias, Rui Policarpo Duarte, José T. de Sousa, Horácio C. Neto
Hybrid Dot-Product Calculation for Convolutional Neural Networks in FPGA. FPL (2019)
Helena Cruz, Rui Policarpo Duarte, Horácio C. Neto
Embedded Fault-Tolerant Accelerator Architecture for Synthetic-Aperture Radar Backprojection. J. Aerosp. Inf. Syst. 16 (11) (2019)
João Vieira, Rui Policarpo Duarte, Horácio C. Neto
kNN-STUFF: kNN STreaming Unit for Fpgas. IEEE Access 7 (2019)
Rui Policarpo Duarte, Álvaro Simões, Rui Henriques, Horácio C. Neto
FPGA-based OpenCL Accelerator for Discovering Temporal Patterns in Gene Expression Data Using Biclustering. PBio@EuroMPI (2018)
Mário P. Véstias, Rui Policarpo Duarte, José T. de Sousa, Horácio C. Neto
Lite-CNN: A High-Performance Architecture to Execute CNNs in Low Density FPGAs. FPL (2018)
Rui Policarpo Duarte, Horácio C. Neto
Stochastic Processors on FPGAs to Compute Sensor Data Towards Fault-Tolerant IoT Systems. DSC (2018)
Rui Policarpo Duarte
Transport Protocols for Large Bandwidth-Delay Product Networks - TCP Extensions and Alternative Transport Protocols. CoRR (2017)
Mário P. Véstias, Rui Policarpo Duarte, José T. de Sousa, Horácio C. Neto
Parallel dot-products for deep learning on FPGA. FPL (2017)
Daniel Porto, João Loff, Rui Policarpo Duarte, Luis Ceze, Rodrigo Rodrigues
Making data center computations fast, but not so furious. CoRR (2017)
Michail S. Vavouras, Rui Policarpo Duarte, Antonino Armato, Christos-Savvas Bouganis
A hybrid ASIC/FPGA fault-tolerant artificial pancreas. SAMOS (2016)
Rui Policarpo Duarte, Christos-Savvas Bouganis
Variation-Aware Optimisation for Reconfigurable Cyber-Physical Systems. DoCEIS (2016)
Rui Policarpo Duarte, Horácio C. Neto, Mário P. Véstias
XtokaxtikoX: A stochastic computing-based autonomous cyber-physical system. ICRC (2016)
Rui Policarpo Duarte, Christos-Savvas Bouganis
ARC 2014 Over-Clocking KLT Designs on FPGAs under Process, Voltage, and Temperature Variation. ACM Trans. Reconfigurable Technol. Syst. 9 (1) (2015)
Rui Policarpo Duarte, Mário P. Véstias, Horácio C. Neto
Enhancing stochastic computations via process variation. FPL (2015)
Mário P. Véstias, Rui Policarpo Duarte, Horácio C. Neto
Designing Hardware/Software Systems for Embedded High-Performance Computing. CoRR (2015)
André Lourenço, Ana Priscila Alves, Carlos Carreiras, Rui Policarpo Duarte, Ana L. N. Fred
CardioWheel: ECG Biometrics on the Steering Wheel. ECML/PKDD (3) (2015)
Rui Policarpo Duarte, Christos-Savvas Bouganis
A Unified Framework for Over-Clocking Linear Projections on FPGAs under PVT Variation. ARC (2014)
Rui Policarpo Duarte, Christos-Savvas Bouganis
Pushing the performance boundary of linear projection designs through device specific optimisations (abstract only). FPGA (2014)
Rui Policarpo Duarte, Christos-Savvas Bouganis
Over-clocking of Linear Projection Designs through Device Specific Optimisations. IPDPS Workshops (2014)
Rui Policarpo Duarte, Christos-Savvas Bouganis
Zero-latency datapath error correction framework for over-clocking DSP applications on FPGAs. ReConFig (2014)
Rui Policarpo Duarte, Christos-Savvas Bouganis
High-level linear projection circuit design optimization framework for FPGAs under over-clocking. FPL (2012)
Rui Policarpo Duarte, Horácio C. Neto, Mário P. Véstias
Double-precision Gauss-Jordan Algorithm with Partial Pivoting on FPGAs. DSD (2009)
Vítor Silva, Rui Policarpo Duarte, Mário P. Véstias, Horácio C. Neto
Multiplier-based double precision floating point divider according to the IEEE-754 standard. ARC (2008)