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Rongliang Fu
ORCID
Publication Activity (10 Years)
Years Active: 2020-2024
Publications (10 Years): 11
Top Topics
Multi Valued Decision Diagrams
Low Power
Neural Network
Design Automation
Top Venues
ACM Great Lakes Symposium on VLSI
DATE
ICCAD
ASP-DAC
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Publications
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Siyan Chen
,
Rongliang Fu
,
Junying Huang
,
Zhimin Zhang
,
Xiaochun Ye
,
Tsung-Yi Ho
,
Dongrui Fan
JPlace: A Clock-Aware Length-Matching Placement for Rapid Single-Flux-Quantum Circuits.
DATE
(2024)
Shui Jiang
,
Rongliang Fu
,
Lukas Burgholzer
,
Robert Wille
,
Tsung-Yi Ho
,
Tsung-Wei Huang
FlatDD: A High-Performance Quantum Circuit Simulator using Decision Diagram and Flat Array.
ICPP
(2024)
Rongliang Fu
,
Olivia Chen
,
Bei Yu
,
Nobuyuki Yoshikawa
,
Tsung-Yi Ho
DLPlace: A Delay-Line Clocking-Based Placement Framework for AQFP Circuits.
ICCAD
(2023)
Rongliang Fu
,
Olivia Chen
,
Nobuyuki Yoshikawa
,
Tsung-Yi Ho
Exact Logic Synthesis for Reversible Quantum-Flux-Parametron Logic.
ICCAD
(2023)
Rongliang Fu
,
Mengmeng Wang
,
Yirong Kan
,
Nobuyuki Yoshikawa
,
Tsung-Yi Ho
,
Olivia Chen
A Global Optimization Algorithm for Buffer and Splitter Insertion in Adiabatic Quantum-Flux-Parametron Circuits.
ASP-DAC
(2023)
Xinda Chen
,
Rongliang Fu
,
Junying Huang
,
Huawei Cao
,
Zhimin Zhang
,
Xiaochun Ye
,
Tsung-Yi Ho
,
Dongrui Fan
JRouter: A Multi-Terminal Hierarchical Length-Matching Router under Planar Manhattan Routing Model for RSFQ Circuits.
ACM Great Lakes Symposium on VLSI
(2023)
Rongliang Fu
,
Junying Huang
,
Mengmeng Wang
,
Nobuyuki Yoshikawa
,
Bei Yu
,
Tsung-Yi Ho
,
Olivia Chen
BOMIG: A Majority Logic Synthesis Framework for AQFP Logic.
DATE
(2023)
Junying Huang
,
Rongliang Fu
,
Xiaochun Ye
,
Dongrui Fan
A survey on superconducting computing technology: circuits, architectures and design tools.
CCF Trans. High Perform. Comput.
4 (1) (2022)
Rongliang Fu
,
Junying Huang
,
Haibin Wu
,
Xiaochun Ye
,
Dongrui Fan
,
Tsung-Yi Ho
JBNN: A Hardware Design for Binarized Neural Networks Using Single-Flux-Quantum Circuits.
IEEE Trans. Computers
71 (12) (2022)
Rongliang Fu
,
Junying Huang
,
Zhimin Zhang
Equivalence Checking for Superconducting RSFQ Logic Circuits.
ACM Great Lakes Symposium on VLSI
(2021)
Rongliang Fu
,
Zhimin Zhang
,
Guang-Ming Tang
,
Junying Huang
,
Xiaochun Ye
,
Dongrui Fan
,
Ninghui Sun
Design Automation Methodology from RTL to Gate-level Netlist and Schematic for RSFQ Logic Circuits.
ACM Great Lakes Symposium on VLSI
(2020)