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JPlace: A Clock-Aware Length-Matching Placement for Rapid Single-Flux-Quantum Circuits.
Siyan Chen
Rongliang Fu
Junying Huang
Zhimin Zhang
Xiaochun Ye
Tsung-Yi Ho
Dongrui Fan
Published in:
DATE (2024)
Keyphrases
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high speed
quantum computing
matching algorithm
logic synthesis
logic circuits
shift register
information retrieval
image matching
shape matching
matching process
total length
computer vision
low cost
fixed length
analog vlsi
quantum computation