Richard L. Willaman

Publication Activity (10 Years)

Years Active: 2012-2023
Publications (10 Years): 3

Top Topics

Clock Frequency

Design Considerations

Power Reduction

Top Venues

IBM J. Res. Dev.

IEEE Trans. Very Large Scale Integr. Syst.

Publications

Brian T. Vanderpool, Phillip J. Restle, Eric Fluhr, Gregory S. Still, Francesco A. Campisano, Ian Charmichael, Eric Marz, Rahul Batra, Richard L. Willaman
Deterministic Frequency and Voltage Enhancements on the POWER10 Processor. IEEE J. Solid State Circuits 58 (1) (2023)
Brian T. Vanderpool, Phillip J. Restle, Eric J. Fluhr, Gregory S. Still, Frank Campisano, Ian Carmichael, Eric Marz, Rahul Batra, Richard L. Willaman
Processor. ISSCC (2022)
Xiaobin Yuan, Pawel Owczarczyk, Alan J. Drake, Marshall D. Tiner, David T. Hui, John P. Pennings, Francesco A. Campisano, Richard L. Willaman, Leana M. Cropp, Rudolph D. Dussault
Design Considerations for Reconfigurable Delay Circuit to Emulate System Critical Paths. IEEE Trans. Very Large Scale Integr. Syst. 23 (11) (2015)
Alan J. Drake, Michael S. Floyd, Richard L. Willaman, Derek J. Hathaway, Joshua Hernandez, Crystal Soja, Marshall D. Tiner, Gary D. Carpenter, Robert M. Senger
Single-cycle, pulse-shaped critical path monitor in the POWER7+ microprocessor. ISLPED (2013)
Michael S. Floyd, Alan J. Drake, Nicole S. Schwartz, Robert W. Berry, Charles Lefurgy, Malcolm S. Ware, Karthick Rajamani, Victor V. Zyuban, Richard L. Willaman, Ruby M. Zgabay
Runtime power reduction capability of the IBM POWER7+ chip. IBM J. Res. Dev. 57 (6) (2013)
Michael S. Floyd, Alan J. Drake, Robert W. Berry, Harold Chase, Richard L. Willaman, Jarom Pena
Voltage droop reduction using throttling controlled by timing margin feedback. VLSIC (2012)