Reto Zimmermann

Publication Activity (10 Years)

Years Active: 1994-2009
Publications (10 Years): 0

Publications

Reto Zimmermann
Datapath Synthesis for Standard-Cell Design. IEEE Symposium on Computer Arithmetic (2009)
Reto Zimmermann
Efficient VLSI Implementation of Modulo (2^n=B11) Addition and Multiplication. IEEE Symposium on Computer Arithmetic (1999)
Reto Zimmermann, Wolfgang Fichtner
Low-power logic styles: CMOS versus pass-transistor logic. IEEE J. Solid State Circuits 32 (7) (1997)
Bruno Haller, Matthias Streiff, Urs Fleisch, Reto Zimmermann
Hardware implementation of a systolic antenna array signal processor based on CORDIC arithmetic. ICASSP (1997)
Reto Zimmermann, Andreas Curiger, Heinz Bonnenberg, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner
A 177 Mb/s VLSI implementation of the International Data Encryption Algorithm. IEEE J. Solid State Circuits 29 (3) (1994)