Hardware implementation of a systolic antenna array signal processor based on CORDIC arithmetic.
Bruno HallerMatthias StreiffUrs FleischReto ZimmermannPublished in: ICASSP (1997)
Keyphrases
- hardware implementation
- signal processor
- antenna array
- signal processing
- fpga implementation
- pipelined architecture
- multipath
- field programmable gate array
- image processing
- image processing algorithms
- pattern recognition
- single chip
- low power
- efficient implementation
- code division multiple access
- computer vision
- fading channels
- parallel architecture
- image reconstruction