Radu Teodorescu

Publication Activity (10 Years)

Years Active: 2001-2024
Publications (10 Years): 32

Top Topics

Parallel Execution

Binary Matrices

Highly Efficient

Top Venues

Publications

Saikat Majumdar, Radu Teodorescu
Voltage Noise-Based Adversarial Attacks on Machine Learning Inference in Multi-Tenant FPGA Accelerators. HOST (2024)
Moein Ghaniyoun, Kristin Barber, Yuan Xiao, Yinqian Zhang, Radu Teodorescu
TEESec: Pre-Silicon Vulnerability Discovery for Trusted Execution Environments. ISCA (2023)
Mengyuan Li, Luca Wilke, Jan Wichelmann, Thomas Eisenbarth, Radu Teodorescu, Yinqian Zhang
A Systematic Look at Ciphertext Side Channels on AMD SEV-SNP. IEEE Symposium on Security and Privacy (2022)
Sudhanva Gurumurthi, Radu Teodorescu
Special Issue on Top Picks From the 2021 Computer Architecture Conferences. IEEE Micro 42 (4) (2022)
Kristin Barber, Moein Ghaniyoun, Yinqian Zhang, Radu Teodorescu
A Pre-Silicon Approach to Discovering Microarchitectural Vulnerabilities in Security Critical Applications. IEEE Comput. Archit. Lett. 21 (1) (2022)
Jiuqin Zhou, Yuan Xiao, Radu Teodorescu, Yinqian Zhang
ENCLYZER: Automated Analysis of Transient Data Leaks on Intel SGX. SEED (2022)
Mohammad Hossein Samavatian, Saikat Majumdar, Kristin Barber, Radu Teodorescu
DNNShield: Dynamic Randomized Model Sparsification, A Defense Against Adversarial Machine Learning. CoRR (2022)
Saikat Majumdar, Mohammad Hossein Samavatian, Radu Teodorescu
Characterizing Side-Channel Leakage of DNN Classifiers though Performance Counters. HOST (2022)
Saikat Majumdar, Mohammad Hossein Samavatian, Kristin Barber, Radu Teodorescu
Using Undervolting as an on-Device Defense Against Adversarial Machine Learning Attacks. HOST (2021)
Jia Guo, Radu Teodorescu, Gagan Agrawal
Fused DSConv: Optimizing Sparse CNN Inference for Execution on Edge Devices. CCGRID (2021)
Mohammad Hossein Samavatian, Saikat Majumdar, Kristin Barber, Radu Teodorescu
HASI: Hardware-Accelerated Stochastic Inference, A Defense Against Adversarial Machine Learning Attacks. CoRR (2021)
Moein Ghaniyoun, Kristin Barber, Yinqian Zhang, Radu Teodorescu
INTROSPECTRE: A Pre-Silicon Framework for Discovery and Analysis of Transient Execution Vulnerabilities. ISCA (2021)
Jia Guo, Radu Teodorescu, Gagan Agrawal
A Fused Inference Design for Pattern-Based Sparse CNN on Edge Devices. HiPC (2021)
Saikat Majumdar, Mohammad Hossein Samavatian, Kristin Barber, Radu Teodorescu
Using Undervolting as an On-Device Defense Against Adversarial Machine Learning Attacks. CoRR (2021)
Jia Guo, Radu Teodorescu, Gagan Agrawal
A Pattern-Based API for Mapping Applications to a Hierarchy of Multi-Core Devices. CCGRID (2020)
Yuan Xiao, Yinqian Zhang, Radu Teodorescu
SPEECHMINER: A Framework for Investigating and Measuring Speculative Execution Vulnerabilities. NDSS (2020)
Mohammad Hossein Samavatian, Anys Bacha, Li Zhou, Radu Teodorescu
RNNFast: An Accelerator for Recurrent Neural Networks Using Domain-Wall Memory. ACM J. Emerg. Technol. Comput. Syst. 16 (4) (2020)
Li Zhou, Mohammad Hossein Samavatian, Anys Bacha, Saikat Majumdar, Radu Teodorescu
Adaptive parallel execution of deep neural networks on heterogeneous edge devices. SEC (2019)
Yuan Xiao, Yinqian Zhang, Radu Teodorescu
SPEECHMINER: A Framework for Investigating and Measuring Speculative Execution Vulnerabilities. CoRR (2019)
Kristin Barber, Anys Bacha, Li Zhou, Yinqian Zhang, Radu Teodorescu
SpecShield: Shielding Speculative Data from Microarchitectural Covert Channels. PACT (2019)
Li Zhou, Hao Wen, Radu Teodorescu, David H. C. Du
Distributing Deep Neural Networks with Containerized Partitions at the Edge. HotEdge (2019)
Sobhan Moosavi, Mohammad Hossein Samavatian, Srinivasan Parthasarathy, Radu Teodorescu, Rajiv Ramnath
Accident Risk Prediction based on Heterogeneous Sparse Data: New Dataset and Insights. CoRR (2019)
Sobhan Moosavi, Mohammad Hossein Samavatian, Srinivasan Parthasarathy, Radu Teodorescu, Rajiv Ramnath
Accident Risk Prediction based on Heterogeneous Sparse Data: New Dataset and Insights. SIGSPATIAL/GIS (2019)
Kristin Barber, Anys Bacha, Li Zhou, Yinqian Zhang, Radu Teodorescu
Isolating Speculative Data to Prevent Transient Execution Attacks. IEEE Comput. Archit. Lett. 18 (2) (2019)
Li Zhou, Ren Chen, Yinglong Xia, Radu Teodorescu
C-Graph: A Highly Efficient Concurrent Graph Reachability Query Framework. ICPP (2018)
Mohammad Hossein Samavatian, Anys Bacha, Li Zhou, Radu Teodorescu
RNNFast: An Accelerator for Recurrent Neural Networks Using Domain Wall Memory. CoRR (2018)
Xiang Pan, Anys Bacha, Spencer Rudolph, Li Zhou, Yinqian Zhang, Radu Teodorescu
NVCool: When Non-Volatile Caches Meet Cold Boot Attacks. ICCD (2018)
Xiang Pan, Anys Bacha, Radu Teodorescu
Respin: Rethinking Near-Threshold Multiprocessor Design with Non-volatile Memory. IPDPS (2017)
Yuan Xiao, Xiaokuan Zhang, Yinqian Zhang, Radu Teodorescu
One Bit Flips, One Cloud Flops: Cross-VM Row Hammer Attacks and Privilege Escalation. USENIX Security Symposium (2016)
Renji Thomas, Naser Sedaghati, Radu Teodorescu
EmerGPU: Understanding and mitigating resonance-induced voltage noise in GPU architectures. ISPASS (2016)
Renji Thomas, Kristin Barber, Naser Sedaghati, Li Zhou, Radu Teodorescu
Core tunneling: Variation-aware voltage noise mitigation in GPUs. HPCA (2016)
Dimitrios Skarlatos, Renji Thomas, Aditya Agrawal, Shibin Qin, Robert C. N. Pilawa-Podgurski, Ulya R. Karpuzcu, Radu Teodorescu, Nam Sung Kim, Josep Torrellas
Snatch: Opportunistically reassigning power allocation between processor and memory in 3D stacks. MICRO (2016)
Anys Bacha, Radu Teodorescu
Authenticache: harnessing cache ECC for system authentication. MICRO (2015)
Vadim Axelrod, Radu Teodorescu
Commentary: When the brain takes a break: a model-based analysis of mind wandering. Frontiers Comput. Neurosci. 9 (2015)
Xiang Pan, Radu Teodorescu
Using STT-RAM to enable energy-efficient near-threshold chip multiprocessors. PACT (2014)
Venmugil Elango, Naser Sedaghati, Fabrice Rastello, Louis-Noël Pouchet, J. Ramanujam, Radu Teodorescu, P. Sadayappan
On Using the Roofline Model with Lower Bounds on Data Movement. ACM Trans. Archit. Code Optim. 11 (4) (2014)
Anys Bacha, Radu Teodorescu
Using ECC Feedback to Guide Voltage Speculation in Low-Voltage Processors. MICRO (2014)
Xiang Pan, Radu Teodorescu
NVSleep: Using non-volatile memory to enable fast sleep/wakeup of idle cores. ICCD (2014)
Timothy N. Miller, Nagarjuna Surapaneni, Radu Teodorescu
Runtime failure rate targeting for energy-efficient reliability in chip microprocessors. Concurr. Comput. Pract. Exp. 25 (6) (2013)
Anys Bacha, Radu Teodorescu
Dynamic reduction of voltage margins by leveraging on-chip ECC in Itanium II processors. ISCA (2013)
Timothy N. Miller, Renji Thomas, Xiang Pan, Radu Teodorescu
VRSync: Characterizing and eliminating synchronization-induced voltage emergencies in many-core processors. ISCA (2012)
Timothy N. Miller, Renji Thomas, Radu Teodorescu
Mitigating the Effects of Process Variation in Ultra-low Voltage Chip Multiprocessors using Dual Supply Voltages and Half-Speed Units. IEEE Comput. Archit. Lett. 11 (2) (2012)
Timothy N. Miller, Xiang Pan, Renji Thomas, Naser Sedaghati, Radu Teodorescu
Booster: Reactive core acceleration for mitigating the effects of process variation and application imbalance in low-voltage chips. HPCA (2012)
Naser Sedaghati, Renji Thomas, Louis-Noël Pouchet, Radu Teodorescu, P. Sadayappan
StVEC: A Vector Instruction Extension for High Performance Stencil Computation. PACT (2011)
Timothy N. Miller, Nagarjuna Surapaneni, Radu Teodorescu
Flexible Error Protection for Energy Efficient Reliable Architectures. SBAC-PAD (2010)
Timothy N. Miller, Renji Thomas, James Dinan, Bruce M. Adcock, Radu Teodorescu
Parichute: Generalized Turbocode-Based Error Correction for Near-Threshold Caches. MICRO (2010)
Radu Teodorescu, Josep Torrellas
Variation-Aware Application Scheduling and Power Management for Chip Multiprocessors. ISCA (2008)
Pin Zhou, Radu Teodorescu, Yuanyuan Zhou
HARD: Hardware-Assisted Lockset-based Race Detection. HPCA (2007)
Radu Teodorescu, Jun Nakano, Abhishek Tiwari, Josep Torrellas
Mitigating Parameter Variation with Dynamic Fine-Grain Body Biasing. MICRO (2007)
Radu Teodorescu, Jun Nakano, Josep Torrellas
SWICH: A Prototype for Efficient Cache-Level Checkpointing and Rollback. IEEE Micro 26 (5) (2006)
Shimin Chen, Babak Falsafi, Phillip B. Gibbons, Michael Kozuch, Todd C. Mowry, Radu Teodorescu, Anastassia Ailamaki, Limor Fix, Gregory R. Ganger, Bin Lin, Steven W. Schlosser
Log-based architectures for general-purpose monitoring of deployed code. ASID (2006)
Radu Teodorescu, Josep Torrellas
Prototyping Architectural Support for Program Rollback Using FPGAs. FCCM (2005)
Lucian Popa, Irina Athanasiu, Costin Raiciu, Raju Pandey, Radu Teodorescu
Using code collection to support large applications on mobile devices. MobiCom (2004)
Radu Teodorescu, Raju Pandey
Using JIT Compilation and Configurable Runtime Systems for Efficient Deployment of Java Programs on Ubiquitous Devices. UbiComp (2001)