Naser Sedaghati

Publication Activity (10 Years)

Years Active: 2011-2017
Publications (10 Years): 3

Top Topics

Graphics Processing Units

Top Venues

Publications

Payman Behnam, Naser Sedaghati, Mahdi Nazm Bojnordi
Adaptive Time-based Encoding for Energy-Efficient Large Cache Architectures. E2SC@SC (2017)
Renji Thomas, Naser Sedaghati, Radu Teodorescu
EmerGPU: Understanding and mitigating resonance-induced voltage noise in GPU architectures. ISPASS (2016)
Renji Thomas, Kristin Barber, Naser Sedaghati, Li Zhou, Radu Teodorescu
Core tunneling: Variation-aware voltage noise mitigation in GPUs. HPCA (2016)
Naser Sedaghati, Te Mu, Louis-Noël Pouchet, Srinivasan Parthasarathy, P. Sadayappan
Automatic Selection of Sparse Matrix Representation on GPUs. ICS (2015)
Arash Ashari, Naser Sedaghati, John Eisenlohr, P. Sadayappan
A model-driven blocking strategy for load balanced sparse matrix-vector multiplication on GPUs. J. Parallel Distributed Comput. 76 (2015)
Arash Ashari, Naser Sedaghati, John Eisenlohr, Srinivasan Parthasarathy, P. Sadayappan
Fast Sparse Matrix-Vector Multiplication on GPUs for Graph Applications. SC (2014)
Arash Ashari, Naser Sedaghati, John Eisenlohr, P. Sadayappan
An efficient two-dimensional blocking strategy for sparse matrix-vector multiplication on GPUs. ICS (2014)
Venmugil Elango, Naser Sedaghati, Fabrice Rastello, Louis-Noël Pouchet, J. Ramanujam, Radu Teodorescu, P. Sadayappan
On Using the Roofline Model with Lower Bounds on Data Movement. ACM Trans. Archit. Code Optim. 11 (4) (2014)
Timothy N. Miller, Xiang Pan, Renji Thomas, Naser Sedaghati, Radu Teodorescu
Booster: Reactive core acceleration for mitigating the effects of process variation and application imbalance in low-voltage chips. HPCA (2012)
Naser Sedaghati, Renji Thomas, Louis-Noël Pouchet, Radu Teodorescu, P. Sadayappan
StVEC: A Vector Instruction Extension for High Performance Stencil Computation. PACT (2011)