Radu Muresan

Publication Activity (10 Years)

Years Active: 2001-2022
Publications (10 Years): 12

Top Topics

Countermeasures

Intelligent Transportation Systems

Top Venues

IET Circuits Devices Syst.

Publications

Zhenning Xu, Hassan Khan, Radu Muresan
TMorph: A Traffic Morphing Framework to Test Network Defenses Against Adversarial Attacks. ICOIN (2022)
Shanhong Liu, Radu Muresan, Arafat Al-Dweik
Leveraging Deep Learning for Inattentive Driving Behavior with In-Vehicle Cameras. ISNCC (2020)
Viktor Lidkea, Radu Muresan, Arafat Al-Dweik, Shu Zhou
Improving the Security of Cloud-Based Intelligent Transportation Systems. CCECE (2019)
Graham Thoms, Radu Muresan, Arafat Al-Dweik
Chaotic Encryption Algorithm With Key Controlled Neural Networks for Intelligent Transportation Systems. IEEE Access 7 (2019)
Kamal Youcef-Toumi, Radu Muresan
Mixed-Signal Physically Unclonable Function With CMOS Capacitive Cells. IEEE Access 7 (2019)
Graham Thoms, Radu Muresan, Arafat Al-Dweik
Design of Chaotic Block Cipher Operation Mode for Intelligent Transportation Systems. ICCE (2019)
Li Yang, Radu Muresan, Arafat Al-Dweik, Leontios J. Hadjileontiadis
Image-Based Visibility Estimation Algorithm for Intelligent Transportation Systems. IEEE Access 6 (2018)
Matthew Mayhew, Radu Muresan
An overview of hardware-level statistical power analysis attack countermeasures. J. Cryptogr. Eng. 7 (3) (2017)
Arafat Al-Dweik, Radu Muresan, Matthew Mayhew, Mark Lieberman
IoT-based multifunctional Scalable real-time Enhanced Road Side Unit for Intelligent Transportation Systems. CCECE (2017)
Arafat Al-Dweik, Matthew Mayhew, Radu Muresan, Shirook M. Ali, Abdallah Shami
Using Technology to Make Roads Safer: Adaptive Speed Limits for an Intelligent Transportation System. IEEE Veh. Technol. Mag. 12 (1) (2017)
Kamal Youcef-Toumi, Radu Muresan
Capacitive physically unclonable function. CCECE (2017)
Matthew Mayhew, Radu Muresan
Implementation of a decoupling based power analysis attack countermeasure. IET Circuits Devices Syst. 10 (6) (2016)
Matthew Mayhew, Radu Muresan
Modeling the effect of NMOS gate capacitance in an on-chip decoupling capacitor PAA countermeasure. MWSCAS (2014)
Matthew Mayhew, Radu Muresan
On-Chip Nanoscale Capacitor Decoupling Architectures for Hardware Security. IEEE Trans. Emerg. Top. Comput. 2 (1) (2014)
Mark Lieberman, Radu Muresan, Simon X. Yang, David Doyle
Hilbert-Huang Transform for Feature Extraction of temperature modulated MOS sensors. Int. J. Inf. Acquis. 9 (3-4) (2013)
Radu Muresan, Matthew Mayhew
On-chip decoupling architecture with variable nMOS gate capacitance for security protection. MWSCAS (2013)
Matthew Mayhew, Radu Muresan
Integrated capacitor switchbox for security protection. ISCAS (2012)
Haleh Vahedi, Stefano Gregori, Radu Muresan
The effectiveness of a current flattening circuit as countermeasure against DPA attacks. Microelectron. J. 42 (1) (2011)
Haleh Vahedi, Stefano Gregori, Radu Muresan
On-Chip Power-Efficient Current Flattening Circuit. J. Circuits Syst. Comput. 18 (3) (2009)
Radu Muresan, Stefano Gregori
Protection Circuit against Differential Power Analysis Attacks for Smart Cards. IEEE Trans. Computers 57 (11) (2008)
Haleh Vahedi, Radu Muresan, Stefano Gregori
On-chip current flattening circuit with dynamic voltage scaling. ISCAS (2006)
Xuequn Li, Haleh Vahedi, Radu Muresan, Stefano Gregori
An integrated current flattening module for embedded cryptosystems. ISCAS (1) (2005)
Radu Muresan, Haleh Vahedi, Y. Zhanrong, Stefano Gregori
Power-smart system-on-chip architecture for embedded cryptosystems. CODES+ISSS (2005)
Radu Muresan, Catherine H. Gebotys
Instantaneous current modeling in a complex VLIW processor core. ACM Trans. Embed. Comput. Syst. 4 (2) (2005)
Radu Muresan, Catherine H. Gebotys
Current flattening in software and hardware for security applications. CODES+ISSS (2004)
Radu Muresan, Catherine H. Gebotys
DSP processor. ISSS (2001)
Catherine H. Gebotys, Radu Muresan
Modeling Power Dynamics for an Embedded DSP Processor Core. An Empirical Model. VLSI-SOC (2001)