Qiongna Zhang

Publication Activity (10 Years)

Years Active: 2014-2015
Publications (10 Years): 1

Top Topics

Design Considerations

Delay Insensitive

Top Venues

Publications

Jan Mulder, Davide Vecchi, Yi Ke, Stefano Bozzola, Mark Core, Nitz Saputra, Qiongna Zhang, Jeff Riley, Han Yan, Mattia Introini, Sijia Wang, Christopher M. Ward, Jan R. Westra, Jiansong Wan, Klaas Bult
26.3 An 800MS/S 10b/13b receiver for 10GBASE-T Ethernet in 28nm CMOS. ISSCC (2015)
Jan R. Westra, Jan Mulder, Yi Ke, Davide Vecchi, Xiaodong Liu, Erol Arslan, Jiansong Wan, Qiongna Zhang, Sijia Wang, Frank M. L. van der Goes, Klaas Bult
Design considerations for low-power analog front ends in full-duplex 10GBASE-T transceivers. CICC (2014)
Jan R. Westra, Jan Mulder, Yi Ke, Davide Vecchi, Xiaodong Liu, Erol Arslan, Jiansong Wan, Qiongna Zhang, Sijia Wang, Frank M. L. van der Goes, Klaas Bult
8.5 A sub-1.75W full-duplex 10GBASE-T transceiver in 40nm CMOS. ISSCC (2014)