Po-Hsun Wu

Publication Activity (10 Years)

Years Active: 2011-2022
Publications (10 Years): 4

Top Topics

Discover Hidden

Microscope Images

Cost Minimization

Tracking Control

Top Venues

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

Publications

Bor-Sen Chen, Po-Hsun Wu
Observer-Based Reference Tracking Control Design of Nonlinear Stochastic Systems: HJIE-Embedded Deep Learning Approach. IEEE Access 10 (2022)
Bor-Sen Chen, Po-Hsun Wu, Min-Yen Lee
Deep Neural Network-Based Filter Design of Nonlinear Stochastic Signal Systems. IEEE Access 9 (2021)
Po-Hsun Wu, Chun-Jen Weng, Pi-Ying Cheng
Auto-focus pathology microscope using sub-array sampling. I2MTC (2019)
Po-Hsun Wu, Mark Po-Hung Lin, Xin Li, Tsung-Yi Ho
Parasitic-Aware Common-Centroid FinFET Placement and Routing for Current-Ratio Matching. ACM Trans. Design Autom. Electr. Syst. 21 (3) (2016)
Po-Hsun Wu, Mark Po-Hung Lin, Xin Li, Tsung-Yi Ho
Common-Centroid FinFET Placement Considering the Impact of Gate Misalignment. ISPD (2015)
Po-Hsun Wu, Mark Po-Hung Lin, Tung-Chieh Chen, Ching-Feng Yeh, Xin Li, Tsung-Yi Ho
A Novel Analog Physical Synthesis Methodology Integrating Existent Design Expertise. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34 (2) (2015)
Po-Hsun Wu, Mark Po-Hung Lin, Tsung-Yi Ho
Analog layout synthesis with knowledge mining. ECCTD (2015)
Po-Hsun Wu, Shang-Ya Bai, Tsung-Yi Ho
A topology-based ECO routing methodology for mask cost minimization. ASP-DAC (2014)
Jiun-Li Lin, Po-Hsun Wu, Tsung-Yi Ho
Placement optimization of flexible TFT circuits with mechanical strain and temperature consideration. ACM J. Emerg. Technol. Comput. Syst. 11 (1) (2014)
Po-Hsun Wu, Che-Wen Chen, Chi-Ruo Wu, Tsung-Yi Ho
Triangle-based process hotspot classification with dummification in EUVL. VLSI-DAT (2014)
Po-Hsun Wu, Mark Po-Hung Lin, Tung-Chieh Chen, Ching-Feng Yeh, Tsung-Yi Ho, Bin-Da Liu
Exploring Feasibilities of Symmetry Islands and Monotonic Current Paths in Slicing Trees for Analog Placement. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33 (6) (2014)
Po-Hsun Wu, Tsung-Yi Ho
Bus-driven floorplanning with thermal consideration. Integr. 46 (4) (2013)
Po-Hsun Wu, Mark Po-Hung Lin, Tung-Chieh Chen, Tsung-Yi Ho, Yu-Chuan Chen
Lithography-aware 1-dimensional cell generation. ECCTD (2013)
Jiun-Li Lin, Po-Hsun Wu, Tsung-Yi Ho
A novel cell placement algorithm for flexible TFT circuit with mechanical strain and temperature consideration. ASP-DAC (2013)
Po-Hsun Wu, Mark Po-Hung Lin, Tung-Chieh Chen, Tsung-Yi Ho, Yu-Chuan Chen, Shun-Ren Siao, Shu-Hung Lin
1-D Cell Generation With Printability Enhancement. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32 (3) (2013)
Po-Hsun Wu, Mark Po-Hung Lin, Yang-Ru Chen, Bing-Shiun Chou, Tung-Chieh Chen, Tsung-Yi Ho, Bin-Da Liu
Performance-driven analog placement considering monotonic current paths. ICCAD (2012)
Po-Hsun Wu, Tsung-Yi Ho
Bus-driven floorplanning with bus pin assignment and deviation minimization. Integr. 45 (4) (2012)
Po-Hsun Wu, Tsung-Yi Ho
Thermal-aware bus-driven floorplanning. ISLPED (2011)