Pierre Boulet

ORCID

Publication Activity (10 Years)

Years Active: 1994-2024
Publications (10 Years): 16

Top Venues

CoRR

IJCNN

Int. J. Reason. based Intell. Syst.

CBMI

École normale supérieure de Lyon, France (PHD)

Education History

École normale supérieure de Lyon, France

PHD

Publications

Thomas Firmin, Pierre Boulet, El-Ghazali Talbi
Parallel Hyperparameter Optimization Of Spiking Neural Network. CoRR (2024)
Anne-Laure Ligozat, Kevin Marquet, Aurélie Bugeau, Julien Lefèvre, Pierre Boulet, Sylvain Bouveret, Philippe Marquet, Olivier Ridoux, Olivier Michel
How to Integrate Environmental Challenges in Computing Curricula? SIGCSE (1) (2022)
Hammouda Elbez, Mohammed Kamel Benhaoua, Philippe Devienne, Pierre Boulet
Progressive compression and weight reinforcement for spiking neural networks. Concurr. Comput. Pract. Exp. 34 (11) (2022)
Hammouda Elbez, Mohammed Kamel Benhaoua, Philippe Devienne, Pierre Boulet
VS2N : Interactive Dynamic Visualization and Analysis Tool for Spiking Neural Networks. CBMI (2021)
Khalil Ibrahim Hamzaoui, Mohammed Berrajaa, Mostafa Azizi, Giuseppe Lipari, Pierre Boulet
Measurement-based methodology for modelling the energy consumption of mobile devices. Int. J. Reason. based Intell. Syst. 12 (1) (2020)
Abdelkader Aroui, Abou El Hassan Benyamina, Pierre Boulet, Mohammed kamel Benhaoua, Amit Kumar Singh
Novel Metric for Load Balance and Congestion Reducing in Network on-Chip. Scalable Comput. Pract. Exp. 21 (2) (2020)
Pierre Falez, Pierre Tirilly, Ioan Marius Bilasco, Philippe Devienne, Pierre Boulet
Multi-layered Spiking Neural Network with Target Timestamp Threshold Adaptation and STDP. IJCNN (2019)
Pierre Falez, Pierre Tirilly, Ioan Marius Bilasco, Philippe Devienne, Pierre Boulet
Unsupervised visual feature learning with spike-timing-dependent plasticity: How far are we from traditional feature learning approaches? Pattern Recognit. 93 (2019)
Pierre Falez, Pierre Tirilly, Ioan Marius Bilasco, Philippe Devienne, Pierre Boulet
Unsupervised Visual Feature Learning with Spike-timing-dependent Plasticity: How Far are we from Traditional Feature Learning Approaches? CoRR (2019)
Pierre Falez, Pierre Tirilly, Ioan Marius Bilasco, Philippe Devienne, Pierre Boulet
Multi-layered Spiking Neural Network with Target Timestamp Threshold Adaptation and STDP. CoRR (2019)
Houssam-Eddine Zahaf, Giuseppe Lipari, Marko Bertogna, Pierre Boulet
The Parallel Multi-Mode Digraph Task Model for Energy-Aware Real-Time Heterogeneous Multi-Core Systems. IEEE Trans. Computers 68 (10) (2019)
Mahyar Shahsavari, Pierre Boulet
Parameter Exploration to Improve Performance of Memristor-Based Neuromorphic Architectures. IEEE Trans. Multi Scale Comput. Syst. 4 (4) (2018)
Pierre Falez, Pierre Tirilly, Ioan Marius Bilasco, Philippe Devienne, Pierre Boulet
Mastering the Output Frequency in Spiking Neural Networks. IJCNN (2018)
Mahyar Shahsavari, Pierre Boulet
Memristor nanodevice for unconventional computing: review and applications. CoRR (2017)
Houssam-Eddine Zahaf, Abou El Hassan Benyamina, Giuseppe Lipari, Richard Olejnik, Pierre Boulet
Modeling Parallel Real-time Tasks with Di-Graphs. RTNS (2016)
Mahyar Shahsavari, Pierre Falez, Pierre Boulet
Combining a volatile and nonvolatile memristor in artificial synapse to improve learning in Spiking Neural Networks. NANOARCH (2016)
Calin Glitia, Julien DeAntoni, Frédéric Mallet, Jean-Vivien Millo, Pierre Boulet, Abdoulaye Gamatié
Progressive and explicit refinement of scheduling for multidimensional data-flow applications using UML MARTE. Des. Autom. Embed. Syst. 19 (1-2) (2015)
Amine El Kouhen, Abdelouahed Gherbi, Cédric Dumoulin, Pierre Boulet, Sébastien Gérard
MID: A MetaCASE Tool for a Better Reuse of Visual Notations. SAM (2014)
Mohammed kamel Benhaoua, Abou El Hassan Benyamina, Pierre Boulet
Heuristics for Routing and Spiral Run-time Task Mapping in NoC-based Heterogeneous MPSOCs. CoRR (2013)
Amine El Kouhen, Cédric Dumoulin, Sebastien Gerard, Pierre Boulet
A component-based approach for specifying reusable visual languages. VL/HCC (2013)
Amine El Kouhen, Sébastien Gérard, Cédric Dumoulin, Pierre Boulet
A component-based approach for specifying DSML's concrete syntax. GMLD@ECOOP (2013)
Majdi Elhaji, Pierre Boulet, Abdelkrim Zitouni, Samy Meftali, Jean-Luc Dekeyser, Rached Tourki
System level modeling methodology of NoC design from UML-MARTE to VHDL. Des. Autom. Embed. Syst. 16 (4) (2012)
Asma Charfi, Chokri Mraidha, Pierre Boulet
An Optimized Compilation of UML State Machines. ISORC (2012)
Calin Glitia, Julien DeAntoni, Frédéric Mallet, Jean-Vivien Millo, Pierre Boulet, Abdoulaye Gamatié
Progressive and explicit refinement of scheduling for multidimensional data-flow applications using uml marte. Des. Autom. Embed. Syst. 16 (2) (2012)
Imran Rafiq Quadri, Abdoulaye Gamatié, Pierre Boulet, Samy Meftali, Jean-Luc Dekeyser
Expressing embedded systems configurations at high abstraction levels with UML MARTE profile: Advantages, limitations and alternatives. J. Syst. Archit. 58 (5) (2012)
Jing Guo, Antonio Wendell De Oliveira Rodrigues, Jeyarajan Thiyagalingam, Frédéric Guyomarc'h, Pierre Boulet, Sven-Bodo Scholz
Harnessing the Power of GPUs without Losing Abstractions in SAC and ArrayOL: A Comparative Study. IPDPS Workshops (2011)
Calin Glitia, Pierre Boulet, Eric Lenormand, Michel Barreteau
Repetitive model refactoring strategy for the design space exploration of intensive signal processing applications. J. Syst. Archit. 57 (9) (2011)
Rosilde Corvino, Abdoulaye Gamatié, Pierre Boulet
Architecture Exploration for Efficient Data Transfer and Storage in Data-Parallel Applications. Euro-Par (1) (2010)
Asma Charfi, Chokri Mraidha, Sébastien Gérard, François Terrier, Pierre Boulet
Toward optimized code generation through model-based optimization. DATE (2010)
Calin Glitia, Philippe Dumont, Pierre Boulet
Array-OL with delays, a domain specific specification language for multidimensional intensive signal processing. Multidimens. Syst. Signal Process. 21 (2) (2010)
Asma Charfi, Chokri Mraidha, Sébastien Gérard, François Terrier, Pierre Boulet
Does Code Generation Promote or Prevent Optimizations? ISORC (2010)
Abdoulaye Gamatié, Éric Rutten, Huafeng Yu, Pierre Boulet, Jean-Luc Dekeyser
Model-Driven Engineering and Formal Validation of High-Performance Embedded Systems. Scalable Comput. Pract. Exp. 10 (2) (2009)
Imran Rafiq Quadri, Pierre Boulet, Samy Meftali, Jean-Luc Dekeyser
Using an MDE Approach for Modeling of Interconnection Networks. ISPAN (2008)
Abdoulaye Gamatié, Éric Rutten, Huafeng Yu, Pierre Boulet, Jean-Luc Dekeyser
Synchronous Modeling and Analysis of Data Intensive Applications. EURASIP J. Embed. Syst. 2008 (2008)
Abdoulaye Gamatié, Éric Rutten, Huafeng Yu, Pierre Boulet, Jean-Luc Dekeyser
Modeling and Formal Validation of High-Performance Embedded Systems. ISPDC (2008)
Calin Glitia, Pierre Boulet
High Level Loop Transformations for Systematic Signal Processing Embedded Applications. SAMOS (2008)
Abou El Hassan Benyamina, Pierre Boulet
Multi-objective Mapping for NoC Architectures. J. Digit. Inf. Manag. 5 (6) (2007)
Pierre Boulet, Philippe Marquet, Éric Piel, Julien Taillard
Repetitive Allocation Modelling with MARTE. FDL (2007)
Ouassila Labbani, Éric Rutten, Jean-Luc Dekeyser, Pierre Boulet
UML2 Profile for Modeling Controlled Data Parallel Applications. FDL (2006)
Lossan Bonde, Pierre Boulet, Jean-Luc Dekeyser
Traceability and Interoperability in Models Transformations. FDL (2005)
Arnaud Cuccuru, Jean-Luc Dekeyser, Philippe Marquet, Pierre Boulet
Towards UML 2 Extensions for Compact Modeling of Regular Complex Topologies. MoDELS (2005)
Pierre Boulet, Arnaud Cuccuru, Jean-Luc Dekeyser, Ashish Meena
Model Driven Engineering for Regular MPSoC Co-design. ReCoSoC (2005)
Ashish Meena, Pierre Boulet
Model Driven Scheduling Framework for Multiprocessor SoC Design. PPAM (2005)
Abdelkader Amar, Pierre Boulet, Philippe Dumont
Projection of the Array-OL Specification Language onto the Kahn Process Network Computation Model. ISPAN (2005)
Ouassila Labbani, Jean-Luc Dekeyser, Pierre Boulet
Mode-Automata Based Methodology for Scade. HSCC (2005)
Arnaud Cuccuru, Pierre Boulet, Jean-Luc Dekeyser
Regular Hardware Architecture Modeling with UML2. FDL (2004)
Pierre Boulet, Jean-Luc Dekeyser, Cédric Dumoulin, Philippe Marquet
MDA for SoC Design, Intensive Signal Processing Experiment. FDL (2003)
Abdelkader Amar, Pierre Boulet, Jean-Luc Dekeyser, T. Theeuwen
Distributed Process Networks - Using Half FIFO Queues in CORBA. PARCO (2003)
Florent Devin, Pierre Boulet, Jean-Luc Dekeyser, Philippe Marquet
GASPARD - A Visual Parallel Programming Environment. PARELEC (2002)
Abdelkader Amar, Pierre Boulet, Jean-Luc Dekeyser
Towards Distributed Process Networks with CORBA. Scalable Comput. Pract. Exp. 5 (4) (2002)
Pierre Boulet, Xavier Redon
Recherche - SPPoC: manipulation automatique de polyèdres pour la compilation. Tech. Sci. Informatiques 20 (8) (2001)
Pierre Boulet, Jean-Luc Dekeyser, Jean-Luc Levaire, Philippe Marquet, Julien Soula, Alain Demeure
Visual Data-Parallel Programming for Signal Processing Applications. PDP (2001)
Emmanuel Cagniot, Jean-Luc Dekeyser, Pierre Boulet, Thomas Brandes, Francis Piriou, Georges Marques
Parallelization of a 3D Magnetostatic Code Using High Performance Fortran. PARELEC (2000)
Emmanuel Cagniot, Thomas Brandes, Jean-Luc Dekeyser, Francis Piriou, Pierre Boulet, Stéphane Clénet
High Level Parallelization of a 3D Electromagnetic Simulation Code with Irregular Communication Patterns. VECPAR (2000)
Pierre Boulet, Jack J. Dongarra, Fabrice Rastello, Yves Robert, Frédéric Vivien
Algorithmic Issues on Heterogeneous Computing Platforms. Parallel Process. Lett. 9 (2) (1999)
Pierre Boulet, Jack J. Dongarra, Yves Robert, Frédéric Vivien
Static tiling for heterogeneous computing platforms. Parallel Comput. 25 (5) (1999)
Pierre Boulet, Xavier Redon
Communication Pre-evaluation in HPF. Euro-Par (1998)
Pierre Boulet, Paul Feautrier
Scanning Polyhedra without Do-loops. IEEE PACT (1998)
Pierre Boulet, Alain Darte, Georges-André Silber, Frédéric Vivien
Loop Parallelization Algorithms: From Parallelism Extraction to Code Generation. Parallel Comput. 24 (3-4) (1998)
Pierre Boulet, Michèle Dion
Code generation in bouclettes. PDP (1997)
Pierre Boulet, Thomas Brandes
Evaluation of Automatic Parallelization Strategies for HPF Compilers. HPCN Europe (1996)
Pierre Boulet
Bouclettes: A Fortran Loop Parallelizer. HPCN Europe (1996)
Vincent Bouchitté, Pierre Boulet, Alain Darte, Yves Robert
Evaluating Array Expressions On Massively Parallel Machines With Communication/ Computation Overlap. Int. J. High Perform. Comput. Appl. 9 (3) (1995)
Pierre Boulet, Alain Darte, Tanguy Risset, Yves Robert
(Pen)-ultimate tiling? Integr. 17 (1) (1994)
Vincent Bouchitté, Pierre Boulet, Alain Darte, Yves Robert
Evaluating Array Expressions on Massively Parallel Machines with Communication/ Computation Overlap. CONPAR (1994)

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Publication Activity (10 Years)

Top Topics

Top Venues

Pierre Boulet