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Pen-Jui Peng
ORCID
Publication Activity (10 Years)
Years Active: 2013-2024
Publications (10 Years): 10
Top Topics
Metal Oxide Semiconductor
Spl Times
Low Cost
Max Csp
Top Venues
ISSCC
IEEE J. Solid State Circuits
A-SSCC
VLSIC
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Publications
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Yen-Po Lin
,
Pen-Jui Peng
,
Chun-Chang Lu
,
Po-Ting Shen
,
Yun-Cheng Jao
,
Ping-Hsuan Hsieh
7.7 A 2.16pJ/b 112Gb/s PAM-4 Transceiver with Time-Interleaved 2b/3b ADCs and Unbalanced Baud-Rate CDR for XSR Applications in 28nm CMOS.
ISSCC
(2024)
Yan-Ting Chen
,
Pen-Jui Peng
,
Hung-Wen Lin
A 12-14.5-GHz 10.2-mW -249-dB FoM Fractional-N Subsampling PLL With a High-Linearity Phase Interpolator in 40-nm CMOS.
IEEE Trans. Very Large Scale Integr. Syst.
30 (5) (2022)
Pen-Jui Peng
Design of ultra-high-speed Transmitters Beyond 100Gb/s in CMOS Technology.
VLSI-DAT
(2022)
Pen-Jui Peng
,
Po-Lin Lee
,
Hsiang-En Huang
,
Wei-Jian Huang
,
Ming-Wei Lin
,
Ying-Zong Juang
,
Sheng-Hsiang Tseng
A 56-Gb/s PAM-4 Transmitter/Receiver Chipset With Nonlinear FFE for VCSEL-Based Optical Links in 40-nm CMOS.
IEEE J. Solid State Circuits
57 (10) (2022)
Pen-Jui Peng
,
Yan-Ting Chen
,
Sheng-Tsung Lai
,
Hsiang-En Huang
A 112-Gb/s PAM-4 Voltage-Mode Transmitter With Four-Tap Two-Step FFE and Automatic Phase Alignment Techniques in 40-nm CMOS.
IEEE J. Solid State Circuits
56 (7) (2021)
Pen-Jui Peng
,
Hsiang-En Huang
,
Wei-Chien Huang
,
Po-Lin Lee
,
Ming-Wei Lin
,
Ying-Zong Juang
,
Sheng-Hsiang Tseng
A 56-Gb/s PAM-4 Optical Transceiver with Nonlinear FFE for VCSEL Driver in 40nm CMOS.
A-SSCC
(2021)
Pen-Jui Peng
,
Sheng-Tsung Lai
,
Wei-Hung Wang
,
Chiang-Wei Lin
,
Wei-Chien Huang
,
Ted Shih
6.8 A 100Gb/s NRZ Transmitter with 8-Tap FFE Using a 7b DAC in 40nm CMOS.
ISSCC
(2020)
Pen-Jui Peng
,
Yan-Ting Chen
,
Sheng-Tsung Lai
,
Chao-Hsuan Chen
,
Hsiang-En Huang
,
Ted Shih
A 112Gb/s PAM-4 Voltage-Mode Transmitter with 4-Tap Two-Step FFE and Automatic Phase Alignment Techniques in 40nm CMOS.
ISSCC
(2019)
Pen-Jui Peng
,
Yan-Ting Chen
,
Chao-Hsuan Chen
,
Sheng-Tsung Lai
,
Hsiang-En Huang
,
Ho-Hsuan Lu
,
Tsai-Chin Yu
A 50-Gb/s Quarter-Rate Voltage-Mode Transmitter with Three-Tap FFE in 40-nm CMOS.
ESSCIRC
(2018)
Pen-Jui Peng
,
Jeng-Feng Li
,
Li-Yang Chen
,
Jri Lee
6.1 A 56Gb/s PAM-4/NRZ transceiver in 40nm CMOS.
ISSCC
(2017)
Li-Yang Chen
,
Pen-Jui Peng
,
Chiro Kao
,
Yu-Lun Chen
,
Jri Lee
CW/FMCW/pulse radar engines for 24/26GHz multi-standard applications in 65nm CMOS.
A-SSCC
(2015)
Jri Lee
,
Ping-Chuan Chiang
,
Pen-Jui Peng
,
Li-Yang Chen
,
Chih-Chi Weng
Design of 56 Gb/s NRZ and PAM4 SerDes Transceivers in CMOS Technologies.
IEEE J. Solid State Circuits
50 (9) (2015)
Pen-Jui Peng
,
Pang-Ning Chen
,
Chiro Kao
,
Yu-Lun Chen
,
Jri Lee
A 94 GHz 3D Image Radar Engine With 4TX/4RX Beamforming Scan Technique in 65 nm CMOS Technology.
IEEE J. Solid State Circuits
50 (3) (2015)
Yu-Lun Chen
,
Chiro Kao
,
Pen-Jui Peng
,
Jri Lee
A 94GHz duobinary keying wireless transceiver in 65nm CMOS.
VLSIC
(2014)
Pang-Ning Chen
,
Pen-Jui Peng
,
Chiro Kao
,
Yu-Lun Chen
,
Jri Lee
A 94GHz 3D-image radar engine with 4TX/4RX beamforming scan technique in 65nm CMOS.
ISSCC
(2013)