Paul Lieverse

Publication Activity (10 Years)

Years Active: 1999-2006
Publications (10 Years): 0

Publications

Ernesto Wandeler, Lothar Thiele, Marcel Verhoef, Paul Lieverse
System architecture evaluation using modular performance analysis: a case study. Int. J. Softw. Tools Technol. Transf. 8 (6) (2006)
Marcel Verhoef, Ernesto Wandeler, Lothar Thiele, Paul Lieverse
System Architecture Evaluation Using Modular Performance Analysis - A Case Study. ISoLA (Preliminary proceedings) (2004)
Vladimir D. Zivkovic, Paul Lieverse
An Overview of Methodologies and Tools in the Field of System-Level Design. Embedded Processor Design Challenges (2002)
Paul Lieverse, Todor P. Stefanov, Pieter van der Wolf, Ed F. Deprettere
System Level Design with Spade: an M-JPEG Case Study. ICCAD (2001)
Paul Lieverse, Pieter van der Wolf, Kees A. Vissers, Ed F. Deprettere
A Methodology for Architecture Exploration of Heterogeneous Signal Processing Systems. J. VLSI Signal Process. 29 (3) (2001)
Andy D. Pimentel, Louis O. Hertzberger, Paul Lieverse, Pieter van der Wolf, Ed F. Deprettere
Exploring Embedded-Systems Architectures with Artemis. Computer 34 (11) (2001)
Paul Lieverse, Pieter van der Wolf, Ed F. Deprettere
A trace transformation technique for communication refinement. CODES (2001)
Erwin A. de Kock, W. J. M. Smits, Pieter van der Wolf, Jean-Yves Brunel, W. M. Kruijtzer, Paul Lieverse, Kees A. Vissers, Gerben Essink
YAPI: application modeling for signal processing systems. DAC (2000)
Ed F. Deprettere, Edwin Rijpkema, Paul Lieverse, Bart Kienhuis
High Level Modeling for Parallel Executions of Nested Loop Algorithms. ASAP (2000)
Pieter van der Wolf, Paul Lieverse, Mudit Goel, David La Hei, Kees A. Vissers
An MPEG-2 decoder case study as a driver for a system level design methodology. CODES (1999)
Paul Lieverse, Ed F. Deprettere, Bart Kienhuis, Erwin A. de Kock
A Clustering Approach to Explore Grain-Sizes in the Definition of Processing Elements in Dataflow Architectures. J. VLSI Signal Process. 22 (1) (1999)