Paul G. A. Jespers

Publication Activity (10 Years)

Years Active: 1962-2015
Publications (10 Years): 1

Top Topics

Genetic Algorithm

Prediction Error

Artificial Neural Networks

Top Venues

Publications

Paul G. A. Jespers, Boris Murmann
Calculation of MOSFET distortion using the transconductance-to-current ratio (gm/ID). ISCAS (2015)
Gian Nicola Angotzi, Massimo Barbaro, Paul G. A. Jespers
Modeling, Evaluation, and Comparison of CRZ and RSD Redundant Architectures for Two-Step A/D Converters. IEEE Trans. Circuits Syst. I Regul. Pap. (9) (2008)
Paul G. A. Jespers
Sizing CMOS circuits by means of the gm/ID methodology and a compact model. SBCCI (2008)
Gian Nicola Angotzi, Massimo Barbaro, Paul G. A. Jespers
Comparison of redundant architectures for two-step ADCs. ACM Great Lakes Symposium on VLSI (2008)
Paul G. A. Jespers
Sizing low-voltage CMOS analog circuits. ICECS (2007)
Andrei Vladimirescu, Radu Zlatanovici, Paul G. A. Jespers
Analog circuit synthesis using standard EDA tools. ISCAS (2006)
Razvan Ionita, Andrei Vladimirescu, Paul G. A. Jespers
Automated Design Methodology for CMOS Analog Circuit Blocks in Complex Systems. PATMOS (2002)
Carlos Dualibe, Paul G. A. Jespers, Michel Verleysen
On Designing Mixed-Signal Fuzzy Logic Controllers as Embedded Subsystems in Standard CMOS Technologies. SBCCI (2001)
Carlos Dualibe, Paul G. A. Jespers, Michel Verleysen
Embedded fuzzy control for automatic channel equalization after digital transmissions. ISCAS (3) (2001)
Carlos Dualibe, Paul G. A. Jespers, Michel Verleysen
A 5.26 Mflips programmable analogue fuzzy logic controller in a standard CMOS 2.4 μ technology. ISCAS (2000)
Denis Flandre, Albert Viviani, Jean-Paul Eggermont, Bernard Gentinne, Paul G. A. Jespers
Improved synthesis of gain-boosted regulated-cascode CMOS stages using symbolic analysis and gm/ID methodology. IEEE J. Solid State Circuits 32 (7) (1997)
Jean-Paul Eggennont, Denis De Ceuster, Denis Flandre, Bernard Gentinne, Paul G. A. Jespers, Jean-Pierre Colinge
Design of SOI CMOS operational amplifiers for applications up to 300°C. IEEE J. Solid State Circuits 31 (2) (1996)
Fernando Silveira, Denis Flandre, Paul G. A. Jespers
based methodology for the design of CMOS analog circuits and its application to the synthesis of a silicon-on-insulator micropower OTA. IEEE J. Solid State Circuits 31 (9) (1996)
Damien Macq, Paul G. A. Jespers
A 10-bit pipelined switched-current A/D converter. IEEE J. Solid State Circuits 29 (8) (1994)
Damien Macq, Michel Verleysen, Paul G. A. Jespers, Jean-Didier Legat
Analog implementation of a Kohonen map with on-chip learning. IEEE Trans. Neural Networks 4 (3) (1993)
Michel Verleysen, Paul G. A. Jespers
Analog VLSI Synapse Matrix with Enhanced Stochastic Computations. IWANN (1991)
André Vandermeulebroecke, Etienne Vanzieleghem, Tony Denayer, Paul G. A. Jespers
A Single Chip 1024 Bits RSA Processor. EUROCRYPT (1989)
Michel Verleysen, Paul G. A. Jespers
An Analog VLSI Architecture for Large Neural Networks. NATO Neurocomputing (1989)
Michel Verleysen, Paul G. A. Jespers
An analog VLSI implementation of Hopfield's neural network. IEEE Micro 9 (6) (1989)
Michel Verleysen, Bruno Sirletti, Paul G. A. Jespers
A large VLSI Hopfield network for pattern recognition problems. Neural Networks 1 (Supplement-1) (1988)
Bruno Sirletti, Michel Verleysen, Andre M. Vandemeulebroecke, Paul G. A. Jespers
An algorithm for pattern recognition with VLSI neural networks. Neural Networks 1 (Supplement-1) (1988)
Michel C. Rahier, Paul G. A. Jespers
Dedicated LSI for a Microprocessor-Controlled Hand-Carried OCR System. IEEE Trans. Computers 29 (2) (1980)
Paul G. A. Jespers, Pe Tsi Chu, Alfred Fettweis
A new method to compute correlation functions (Abstr.). IRE Trans. Inf. Theory 8 (5) (1962)