Panu Sjovall

Publication Activity (10 Years)

Years Active: 2015-2019
Publications (10 Years): 6

Top Topics

Discrete Cosine Transform

Hardware Architectures

Top Venues

Publications

Sakari Lahti, Panu Sjovall, Jarno Vanne, Timo D. Hämäläinen
Are We There Yet? A Study on the State of High-Level Synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38 (5) (2019)
Vili Viitamäki, Panu Sjovall, Jarno Vanne, Timo D. Hämäläinen
High-level synthesized 2-D IDCT/IDST implementation for HEVC codecs on FPGA. ISCAS (2017)
Panu Sjovall, Vili Viitamäki, Arto Oinonen, Jarno Vanne, Timo D. Hämäläinen, Ari Kulmala
Kvazaar 4K HEVC intra encoder on FPGA accelerated airframe server. SiPS (2017)
Panu Sjovall, Vili Viitamäki, Jarno Vanne, Timo D. Hämäläinen
High-level synthesis implementation of HEVC 2-D DCT/DST on FPGA. ICASSP (2017)
Janne Virtanen, Panu Sjovall, Marko Viitanen, Timo D. Hämäläinen, Jarno Vanne
Distributed systemc simulation on manycore servers. NORCAS (2016)
Panu Sjovall, Janne Virtanen, Jarno Vanne, Timo D. Hämäläinen
High-Level Synthesis Design Flow for HEVC Intra Encoder on SoC-FPGA. DSD (2015)