P. V. Ananda Mohan

Publication Activity (10 Years)

Years Active: 1985-2024
Publications (10 Years): 11

Top Topics

Digital Signature

Partially Blind Signature Scheme

Top Venues

Circuits Syst. Signal Process.

IEEE Trans. Circuits Syst. II Express Briefs

IEEE J. Solid State Circuits

Publications

P. V. Ananda Mohan
New Generalized Impedance Converter (GIC)-Based Two-Opamp Active RC Biquads. Circuits Syst. Signal Process. 43 (3) (2024)
P. V. Ananda Mohan
Hash-based Digital Signatures- A tutorial review. PKIA (2023)
P. V. Ananda Mohan
Analysis of GIC-Based Frequency-Dependent Negative Resistance-Based Filters. Circuits Syst. Signal Process. 42 (4) (2023)
P. V. Ananda Mohan, Abey Jacob, Raghavendra S. Patil
Public Key Cryptographic Implementation Validation: A Review. PKIA (2022)
P. V. Ananda Mohan, P. S. Phalguna
-1}. IEEE Trans. Circuits Syst. II Express Briefs 68 (4) (2021)
P. V. Ananda Mohan
On Actively Compensated Amplifiers Using Negative Impedance Converters. IEEE Trans. Circuits Syst. II Express Briefs (4) (2020)
P. V. Ananda Mohan
Reverse Converters for the Moduli Set { \(2^{n}, 2^{n-1}-1, 2^{n}-1, 2^{n+1}-1\}(n\, \hbox {Even})\). Circuits Syst. Signal Process. 37 (8) (2018)
P. S. Phalguna, Dattaguru V. Kamat, P. V. Ananda Mohan
-1} for n even. MWSCAS (2018)
P. S. Phalguna, Dattaguru V. Kamat, P. V. Ananda Mohan
RNS-to-Binary Converters for New Three-Moduli Sets {2k-3, 2k-2, 2k-1} and {2k+1, 2k+2, 2k+3}. J. Circuits Syst. Comput. 27 (14) (2018)
P. V. Ananda Mohan
Reverse Conversion Using Core Function, CRT and Mixed Radix Conversion. Circuits Syst. Signal Process. 36 (7) (2017)
P. V. Ananda Mohan
RNS to Binary Conversion Using Diagonal Function and Pirlo and Impedovo Monotonic Function. Circuits Syst. Signal Process. 35 (3) (2016)
P. V. Ananda Mohan, Yaohua Zhao, Pui-In Mak, Rui Paulo Martins, Franco Maloberti
59.2 dB SFDR 4th-Order SC LPF With 0.5-to-10 MHz Bandwidth Scalability Exploiting a Recycling SC-Buffer Biquad". IEEE J. Solid State Circuits 50 (10) (2015)
P. V. Ananda Mohan, Eric A. M. Klumperink, Dlovan H. Mahrof, Bram Nauta
Comments on "Cancellation of OpAmp Virtual Ground Imperfections by a Negative Conductance Applied to Improve RF Receiver Linearity". IEEE J. Solid State Circuits 49 (9) (2014)
Rashmi R. Rachh, P. V. Ananda Mohan, Basavaraj S. Anami
Implementation of AES Key Schedule Using Look-Ahead Technique. Circuits Syst. Signal Process. 33 (11) (2014)
P. V. Ananda Mohan
Comments on "Noise Performance of a Regulated Cascode Transimpedance Amplifier for Radiation Detectors". IEEE Trans. Circuits Syst. I Regul. Pap. (8) (2013)
Rashmi R. Rachh, P. V. Ananda Mohan, Basavaraj S. Anami
Efficient Implementations for AES Encryption and Decryption. Circuits Syst. Signal Process. 31 (5) (2012)
P. V. Ananda Mohan
Comments on "Avoiding the Gain-Bandwidth Trade Off in Feedback Amplifiers". IEEE Trans. Circuits Syst. I Regul. Pap. (9) (2011)
Dattaguru V. Kamat, P. V. Ananda Mohan, K. Gopalakrishna Prabhu
Novel First-Order and Second-Order Current-Mode Filters Using Multiple-Output Operational Transconductance Amplifiers. Circuits Syst. Signal Process. 29 (3) (2010)
P. V. Ananda Mohan
Sensitivity Analysis of Third and Fourth-Order Filters. Circuits Syst. Signal Process. 29 (5) (2010)
P. V. Ananda Mohan
-RC Reconfigurable (UMTS/WLAN) Filter". IEEE J. Solid State Circuits 42 (2) (2007)
P. V. Ananda Mohan
Floating Capacitance Simulation Using Current Conveyors. J. Circuits Syst. Comput. 14 (1) (2005)
P. V. Ananda Mohan
Fast implementations of Montgomery's modular multiplication algorithm. ISCAS (4) (2003)
P. V. Ananda Mohan
Efficient Design of Binary to RNS Converters. J. Circuits Syst. Comput. 9 (3-4) (1999)
D. V. Poornaiah, P. V. Ananda Mohan
A novel VLSI concurrent dual multiplier-dual adder architecture for image and video coding applications. VLSI Design (1996)
D. V. Poornaiah, P. V. Ananda Mohan
Design of a 3-bit Booth recoded novel VLSI concurrent multiplier-accumulator architecture. VLSI Design (1995)
P. V. Ananda Mohan
Capacitor Floatation Scheme using only OTAs and Grounded capacitors. J. Circuits Syst. Comput. 5 (2) (1995)
P. V. Ananda Mohan
Novel Design for Binary to RNS Converters. ISCAS (1994)
Y. V. Ramana Rao, P. V. Ananda Mohan
Novel oversampled A/D converters based on error spectrum shaping. ISCAS (1993)
P. V. Ananda Mohan
New structures for MOSFET-C filters. Proc. IEEE 75 (7) (1987)
P. V. Ananda Mohan
Active filter design using cascaded identical low-order (≥ 2) filter sections. Proc. IEEE 73 (10) (1985)