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D. V. Poornaiah
Publication Activity (10 Years)
Years Active: 1993-1996
Publications (10 Years): 0
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Publications
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D. V. Poornaiah
,
P. V. Ananda Mohan
A novel VLSI concurrent dual multiplier-dual adder architecture for image and video coding applications.
VLSI Design
(1996)
D. V. Poornaiah
,
P. V. Ananda Mohan
Design of a 3-bit Booth recoded novel VLSI concurrent multiplier-accumulator architecture.
VLSI Design
(1995)
D. V. Poornaiah
,
R. Haribabu
,
M. Omair Ahmad
Design and VLSI implementation of a novel concurrent 16-bit multiplier-accumulator for DSP applications.
ICASSP (1)
(1993)