Niranjan M. Devashrayee

Publication Activity (10 Years)

Years Active: 2010-2011
Publications (10 Years): 0

Publications

Usha Sandeep Mehta, Kankar S. Dasgupta, Niranjan M. Devashrayee
Suitability of Various Low-Power Testing Techniques for IP Core-Based SoC: A Survey. VLSI Design 2011 (2011)
Usha Sandeep Mehta, Niranjan M. Devashrayee, Kankar S. Dasgupta
Combining Unspecified Test Data Bit Filling Methods and Run Length Based Codes to Estimate Compression, Power and Area Overhead. ISVLSI (2010)
Usha Sandeep Mehta, Niranjan M. Devashrayee, Kankar S. Dasgupta
Hamming Distance Based 2-D Reordering with Power Efficient Don't Care Bit Filling: Optimizing the test data compression method. SoC (2010)
Usha Sandeep Mehta, Kankar S. Dasgupta, Niranjan M. Devashrayee
Run-Length-Based Test Data Compression Techniques: How Far from Entropy and Power Bounds? - A Survey. VLSI Design 2010 (2010)
Usha Sandeep Mehta, Kankar S. Dasgupta, Niranjan M. Devashrayee
Combining unspecified test data bit filling methods and run length based codes to estimate compression, power and area overhead. APCCAS (2010)