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Suitability of Various Low-Power Testing Techniques for IP Core-Based SoC: A Survey.
Usha Sandeep Mehta
Kankar S. Dasgupta
Niranjan M. Devashrayee
Published in:
VLSI Design (2011)
Keyphrases
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low power
low cost
high speed
power consumption
high power
single chip
low power consumption
wireless transmission
digital signal processing
logic circuits
image sensor
vlsi circuits
signal processor
power reduction
gate array
real time
vlsi architecture
cmos technology
hardware and software