N. P. van der Meijs

Publication Activity (10 Years)

Years Active: 1984-2011
Publications (10 Years): 0

Publications

Pieter Harpe, Cui Zhou, Yu Bi, N. P. van der Meijs, Xiaoyan Wang, Kathleen Philips, Guido Dolmans, Harmke de Groot
A 26 μ W 8 bit 10 MS/s Asynchronous SAR ADC for Low Energy Radios. IEEE J. Solid State Circuits 46 (7) (2011)
Yu Bi, Pieter Harpe, N. P. van der Meijs
Efficient sensitivity-based capacitance modeling for systematic and random geometric variations. ASP-DAC (2011)
Giuseppe S. Garcea, N. P. van der Meijs, Kees-Jan van der Kolk, Ralph H. J. M. Otten
Statistically Aware Buffer Planning. DATE (2004)
Giuseppe S. Garcea, N. P. van der Meijs, Ralph H. J. M. Otten
Simultaneous Analytic Area and Power Optimization for Repeater Insertion. ICCAD (2003)
Eelco Schrik, Patrick M. Dewilde, N. P. van der Meijs
Theoretical and practical validation of combined BEM/FEM substrate resistance modeling. ICCAD (2002)
Eelco Schrik, N. P. van der Meijs
Combined BEM/FEM substrate resistance modeling. DAC (2002)
A. J. Dammers, N. P. van der Meijs
Virtual screening: a step towards a sparse partial inductance matrix. ICCAD (1999)
U. Geigenmüller, N. P. van der Meijs
Cartesian multipole based numerical integration for 3D capacitance extraction. ED&TC (1997)
P. J. H. Elias, N. P. van der Meijs
Extracting Circuit Models for Large RC Interconnections that are Accurate up to a Predefined Signal Frequency. DAC (1996)
Arjan J. van Genderen, N. P. van der Meijs, T. Smedes
Fast Computation of Substrate Resistances in Large Circuits. ED&TC (1996)
P. J. H. Elias, N. P. van der Meijs
Including Higher-Order Moments of RC Interconnections in Layout-to-Circuit Extraction. ED&TC (1996)
N. P. van der Meijs, T. Smedes
Accurate interconnect modeling: towards multi-million transistor chips as microwave circuits. ICCAD (1996)
Arjan J. van Genderen, N. P. van der Meijs
Using Articulation Nodes to Improve the Efficiency of Finite-Element based Resistance Extraction. DAC (1996)
T. Smedes, N. P. van der Meijs, Arjan J. van Genderen
Extraction of circuit models for substrate cross-talk. ICCAD (1995)
N. P. van der Meijs, Arjan J. van Genderen
Delayed Frontal Solution for Finite-Element Based Resistance Extraction. DAC (1995)
Frederik Beeftink, Arjan J. van Genderen, N. P. van der Meijs
Accurate and efficient layout-to-circuit extraction for high-speed MOS and bipolar/BiCMOS integrated circuits. ICCD (1995)
Arjan J. van Genderen, N. P. van der Meijs
Hierarchical extraction of 3D interconnect capacitances in large regular VLSI structures. ICCAD (1993)
N. P. van der Meijs, Arjan J. van Genderen
An Efficient Finite Element Method for Submicron IC Capacitance Extraction. DAC (1989)
N. P. van der Meijs, J. T. Fokkema
VLSI circuit reconstruction from mask topology. Integr. 2 (2) (1984)