Arjan J. van Genderen

Publication Activity (10 Years)

Years Active: 1989-2009
Publications (10 Years): 0

Publications

Marius Enachescu, Sorin Cotofana, Arjan J. van Genderen, Dimitrios Tsamados, Adrian M. Ionescu
Can SG-FET Replace FET in Sleep Mode Circuits? NanoNet (2009)
Arjan J. van Genderen, N. P. van der Meijs, T. Smedes
Fast Computation of Substrate Resistances in Large Circuits. ED&TC (1996)
Arjan J. van Genderen, N. P. van der Meijs
Using Articulation Nodes to Improve the Efficiency of Finite-Element based Resistance Extraction. DAC (1996)
T. Smedes, N. P. van der Meijs, Arjan J. van Genderen
Extraction of circuit models for substrate cross-talk. ICCAD (1995)
Arjan J. van Genderen
Network initialization in a switch-level simulator. ED&TC (1995)
N. P. van der Meijs, Arjan J. van Genderen
Delayed Frontal Solution for Finite-Element Based Resistance Extraction. DAC (1995)
Frederik Beeftink, Arjan J. van Genderen, N. P. van der Meijs
Accurate and efficient layout-to-circuit extraction for high-speed MOS and bipolar/BiCMOS integrated circuits. ICCD (1995)
Arjan J. van Genderen, N. P. van der Meijs
Hierarchical extraction of 3D interconnect capacitances in large regular VLSI structures. ICCAD (1993)
N. P. van der Meijs, Arjan J. van Genderen
An Efficient Finite Element Method for Submicron IC Capacitance Extraction. DAC (1989)