Myeong-Eun Hwang

Publication Activity (10 Years)

Years Active: 2004-2016
Publications (10 Years): 1

Top Topics

Top Venues

J. Electr. Comput. Eng.

Publications

Myeong-Eun Hwang, Sungoh Kwon
MOS Direct Path Flip-Flops for Process-Resilient Ultradynamic Voltage Scaling. J. Electr. Comput. Eng. 2016 (2016)
Myeong-Eun Hwang, Kaushik Roy
ABRM: Adaptive Beta -Ratio Modulation for Process-Tolerant Ultradynamic Voltage Scaling. IEEE Trans. Very Large Scale Integr. Syst. 18 (2) (2010)
Myeong-Eun Hwang, Seong-Ook Jung, Kaushik Roy
Slope Interconnect Effort: Gate-Interconnect Interdependent Delay Modeling for Early CMOS Circuit Simulation. IEEE Trans. Circuits Syst. I Regul. Pap. (7) (2009)
Myeong-Eun Hwang, Kaushik Roy
A 135mV 0.13μW process tolerant 6T subthreshold DTMOS SRAM in 90nm technology. CICC (2008)
Myeong-Eun Hwang, Seong-Ook Jung, Kaushik Roy
Slope interconnect effort: gate-interconnect interdependentdelay model for CMOS logic gates. ISLPED (2007)
Myeong-Eun Hwang, Tamer Cakici, Kaushik Roy
Interactive presentation: Process tolerant beta-ratio modulation for ultra-dynamic voltage scaling. DATE (2007)
Myeong-Eun Hwang, Arijit Raychowdhury, Kairshik Roy
Energy-Recovery Techniques to Reduce On-Chip Power Density in Molecular Nanotechnologies. IEEE Trans. Circuits Syst. I Regul. Pap. (8) (2005)
Myeong-Eun Hwang, Arijit Raychowdhury, Kaushik Roy
Effectiveness of energy recovery techniques in reducing on-chip power density in molecular nano-technologies. ISCAS (3) (2004)