Mustafa M. Shihab

Publication Activity (10 Years)

Years Active: 2014-2023
Publications (10 Years): 15

Top Topics

Power Distribution

Functional Decomposition

Top Venues

Publications

Zhaokun Han, Mohammed Shayan, Aneesh Dixit, Mustafa M. Shihab, Yiorgos Makris, Jeyavijayan Rajendran
FuncTeller: How Well Does eFPGA Hide Functionality? CoRR (2023)
Zhaokun Han, Mohammed Shayan, Aneesh Dixit, Mustafa M. Shihab, Yiorgos Makris, Jeyavijayan Rajendran
FuncTeller: How Well Does eFPGA Hide Functionality? USENIX Security Symposium (2023)
Alexander J. Edwards, Naimul Hassan, Dhritiman Bhattacharya, Mustafa M. Shihab, Peng Zhou, Xuan Hu, Jayasimha Atulasimha, Yiorgos Makris, Joseph S. Friedman
Physically and Algorithmically Secure Logic Locking with Hybrid CMOS/Nanomagnet Logic Circuits. DATE (2022)
Naimul Hassan, Alexander J. Edwards, Dhritiman Bhattacharya, Mustafa M. Shihab, Varun Venkat, Peng Zhou, Xuan Hu, Shamik Kundu, Abraham Peedikayil Kuruvila, Kanad Basu, Jayasimha Atulasimha, Yiorgos Makris, Joseph S. Friedman
Secure Logic Locking with Strain-Protected Nanomagnet Logic. DAC (2021)
Bo Hu, Mustafa M. Shihab, Yiorgos Makris, Benjamin Carrión Schäfer, Carl Sechen
An Efficient MILP-Based Aging-Aware Floorplanner for Multi-Context Coarse-Grained Runtime Reconfigurable FPGAs. DATE (2020)
Mustafa M. Shihab, Bharath Ramanidharan, Gaurav Rajavendra Reddy, Jingxiang Tian, William Swartz, Carl Sechen, Yiorgos Makris
CASPER: CAD Framework for a Novel Transistor-Level Programmable Fabric. ISCAS (2020)
Bo Hu, Jingxiang Tian, Mustafa M. Shihab, Gaurav Rajavendra Reddy, William Swartz, Yiorgos Makris, Benjamin Carrión Schäfer, Carl Sechen
Functional Obfuscation of Hardware Accelerators through Selective Partial Design Extraction onto an Embedded FPGA. ACM Great Lakes Symposium on VLSI (2019)
Bo Hu, Mustafa M. Shihab, Yiorgos Makris, Benjamin Carrión Schäfer, Carl Sechen
Extending the Lifetime of Coarse-Grained Runtime Reconfigurable FPGAs by Balancing Processing Element Usage. FPT (2019)
Mustafa M. Shihab, Jingxiang Tian, Gaurav Rajavendra Reddy, Bo Hu, William Swartz, Benjamin Carrión Schäfer, Carl Sechen, Yiorgos Makris
Design Obfuscation through Selective Post-Fabrication Transistor-Level Programming. DATE (2019)
Monir Zaman, Mustafa M. Shihab, Ayse K. Coskun, Yiorgos Makris
CAPE: A cross-layer framework for accurate microprocessor power estimation. Integr. 68 (2019)
Mustafa M. Shihab, Vishwani D. Agrawal
Energy Efficient Power Distribution on Many-Core SoC. VLSI Design (2019)
Mustafa M. Shihab, Jie Zhang, Myoungsoo Jung, Mahmut T. Kandemir
ReveNAND: A Fast-Drift-Aware Resilient 3D NAND Flash Design. ACM Trans. Archit. Code Optim. 15 (2) (2018)
Monir Zaman, Mustafa M. Shihab, Ayse K. Coskun, Yiorgos Makris
Towards a Cross-Layer Framework for Accurate Power Modeling of Microprocessor Designs. PATMOS (2018)
Mustafa M. Shihab, Jie Zhang, Shuwen Gao, Josep Sloan, Myoungsoo Jung
Couture: Tailoring STT-MRAM for Persistent Main Memory. INFLOW@OSDI (2016)
Jie Zhang, Gieseo Park, Mustafa M. Shihab, David Donofrio, John Shalf, Myoungsoo Jung
OpenNVM: An open-sourced FPGA-based NVM controller for low level memory characterization. ICCD (2015)
Jie Zhang, Mustafa M. Shihab, Myoungsoo Jung
Power, Energy, and Thermal Considerations in SSD-Based I/O Acceleration. HotStorage (2014)