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Mong-Kai Ku
Publication Activity (10 Years)
Years Active: 1999-2013
Publications (10 Years): 0
Top Topics
Ldpc Codes
Decoding Algorithm
Low Power
Communication Systems
Top Venues
Int. J. Commun. Syst.
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Publications
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Chia-Yu Lin
,
Shu-Cheng Chou
,
Mong-Kai Ku
Operation reduced low-density parity-check decoding algorithms for low power communication systems.
Int. J. Commun. Syst.
26 (1) (2013)
Chia-Yu Lin
,
Chih-Chun Wei
,
Mong-Kai Ku
Two-Way Parity Bit Correction Encoding Algorithm for Dual-Diagonal LDPC Codes.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
(2) (2011)
Chun F. Hsu
,
Mong-Kai Ku
,
Li-Yen Liu
Support vector machine FPGA implementation for video shot boundary detection application.
SoCC
(2009)
Chia-Yu Lin
,
Mong-Kai Ku
Node Operation Reduced Decoding for LDPC Codes.
ISCAS
(2009)
Shu-Cheng Chou
,
Mong-Kai Ku
,
Chia-Yu Lin
Switching activity reducing layered decoding algorithm for LDPC codes.
ISCAS
(2008)
Chia-Yu Lin
,
Mong-Kai Ku
,
Yi-Hsing Chien
Long Length LDPC Code Construction and the Corresponding Decoder Implementation with Adjustable Parallelism.
VTC Spring
(2008)
Chia-Yu Lin
,
Chih-Chun Wei
,
Mong-Kai Ku
Efficient encoding for dual-diagonal structured LDPC codes based on parity bit prediction and correction.
APCCAS
(2008)
Yi-Hsing Chien
,
Mong-Kai Ku
A High Throughput H-QC LDPC Decoder.
ISCAS
(2007)
Shao-Yi Chien
,
Chi-Sheng Shih
,
Mong-Kai Ku
,
Chia-Lin Yang
,
Yao-Wen Chang
,
Tei-Wei Kuo
,
Liang-Gee Chen
3D Video Applications and Intelligent Video Surveillance Camera and its VLSI Design.
ICME
(2007)
Chi-Sheng Shih
,
Chia-Lin Yang
,
Mong-Kai Ku
,
Tei-Wei Kuo
,
Shao-Yi Chien
,
Yao-Wen Chang
,
Liang-Gee Chen
Reconfigurable Platform for Content Science Research.
RTCSA
(2005)
Alan Y. Kwentus
,
Patrick Pai
,
Steven Jaffe
,
Ray Gomez
,
Shauhyuarn Sean Tsai
,
Tom Kwan
,
Hing T. Hung
,
Young J. Shin
,
Vin Hue
,
Darwin Cheung
,
Raheel A. Khan
,
Christopher M. Ward
,
Mong-Kai Ku
,
Kenneth Choi
,
Jim Searle
,
Klaas Bult
,
Kelly Cameron
,
Jason Demas
,
Charles Reames
,
Henry Samueli
A single-chip universal digital satellite receiver with 480-MHz IF input.
IEEE J. Solid State Circuits
34 (11) (1999)