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Miyako Shizuno
Publication Activity (10 Years)
Years Active: 2011-2014
Publications (10 Years): 0
Top Topics
Power Reduction
Cmos Technology
Rbf Neural Network
Dc Dc Converter
Top Venues
ISSCC
IEEE J. Solid State Circuits
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Publications
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Fumihiko Tachibana
,
Osamu Hirabayashi
,
Yasuhisa Takeyama
,
Miyako Shizuno
,
Atsushi Kawasumi
,
Keiichi Kushida
,
Azuma Suzuki
,
Yusuke Niki
,
Shinichi Sasaki
,
Tomoaki Yabe
,
Yasuo Unekawa
A 27% Active and 85% Standby Power Reduction in Dual-Power-Supply SRAM Using BL Power Calculator and Digitally Controllable Retention Circuit.
IEEE J. Solid State Circuits
49 (1) (2014)
Fumihiko Tachibana
,
Osamu Hirabayashi
,
Yasuhisa Takeyama
,
Miyako Shizuno
,
Atsushi Kawasumi
,
Keiichi Kushida
,
Azuma Suzuki
,
Yusuke Niki
,
Shinichi Sasaki
,
Tomoaki Yabe
,
Yasuo Unekawa
A 27% active and 85% standby power reduction in dual-power-supply SRAM using BL power calculator and digitally controllable retention circuit.
ISSCC
(2013)
Keiichi Kushida
,
Osamu Hirabayashi
,
Fumihiko Tachibana
,
Hiroyuki Hara
,
Atsushi Kawasumi
,
Azuma Suzuki
,
Yasuhisa Takeyama
,
Yuki Fujimura
,
Yusuke Niki
,
Miyako Shizuno
,
Shinichi Sasaki
,
Tomoaki Yabe
A trimless, 0.5V-1.0V wide voltage operation, high density SRAM macro utilizing dynamic cell stability monitor and multiple memory cell access.
A-SSCC
(2011)