Michal Kekely

Publication Activity (10 Years)

Years Active: 2017-2023
Publications (10 Years): 9

Top Topics

Loss Probability

High Speed Networks

Network Conditions

Top Venues

Publications

Michal Kekely, Jan Korenek
Optimizing Packet Classification on FPGA. DDECS (2023)
Michal Kekely, Lukás Kekely, Jan Korenek
General memory efficient packet matching FPGA architecture for future high-speed networks. Microprocess. Microsystems 73 (2020)
Tomás Benes, Michal Kekely, Karel Hynek, Tomás Cejka
Pipelined ALU for effective external memory access in FPGA. DSD (2020)
Zdenek Martinasek, Jan Hajny, David Smekal, Lukas Malina, Denis Matousek, Michal Kekely, Nele Mentens
200 Gbps Hardware Accelerated Encryption System for FPGA Network Cards. ASHES@CCS (2018)
Michal Kekely, Lukas Kekely, Jan Korenek
Memory Aware Packet Matching Architecture for High-Speed Networks. DSD (2018)
Jakub Cabal, Pavel Benácek, Lukas Kekely, Michal Kekely, Viktor Pus, Jan Korenek
Configurable FPGA Packet Parser for Terabit Networks with Guaranteed Wire-Speed Throughput. FPGA (2018)
Michal Kekely, Jan Korenek
Mapping of P4 match action tables to FPGA. FPL (2017)
Pavel Benácek, Viktor Pus, Jan Korenek, Michal Kekely
Line rate programmable packet processing in 100Gb networks. FPL (2017)
Michal Kekely, Jan Korenek
Packet Classification with Limited Memory Resources. DSD (2017)