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200 Gbps Hardware Accelerated Encryption System for FPGA Network Cards.
Zdenek Martinasek
Jan Hajny
David Smekal
Lukas Malina
Denis Matousek
Michal Kekely
Nele Mentens
Published in:
ASHES@CCS (2018)
Keyphrases
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network communication
low cost
computer networks
hardware implementation
real time
network structure
network traffic
real time image processing
peer to peer
complex networks
high speed
communication networks
network model
data flow
field programmable gate array
hardware design
information hiding