María José Moure

Publication Activity (10 Years)

Years Active: 1996-2015
Publications (10 Years): 1

Top Topics

Estimation Algorithm

Advanced Features

Network Architecture

Top Venues

IEEE Trans. Ind. Informatics

Publications

Juan J. Rodríguez-Andina, María Dolores Valdés Peña, María José Moure
Advanced Features and Industrial Applications of FPGAs - A Review. IEEE Trans. Ind. Informatics 11 (4) (2015)
María Dolores Valdés, María José Moure, Luis Manuel Menéndez
Full autonomous sensor and actuator network for maturity estimation in early age concrete structures. IECON (2013)
Judit Freijedo, María Dolores Valdés, Lucía Costas, María José Moure, Juan J. Rodríguez-Andina, Jorge Semião, Fabian Vargas, Isabel C. Teixeira, João Paulo Teixeira
Operation of FPGA-Based Digital Circuits Through Delay Modeling and Time Borrowing. J. Low Power Electron. 7 (2) (2011)
María Dolores Valdés, Judit Freijedo, María José Moure, Juan J. Rodríguez-Andina, Jorge Semião, Fabian Vargas, Isabel C. Teixeira, João Paulo Teixeira
Programmable sensor for on-line checking of signal integrity in FPGA-based systems subject to aging effects. LATW (2011)
Judit Freijedo, Lucía Costas, Jorge Semião, Juan J. Rodríguez-Andina, María José Moure, Fabian Vargas, Isabel C. Teixeira, João Paulo Teixeira
Impact of Power Supply Voltage Variations on FPGA-Based Digital Systems Performance. J. Low Power Electron. 6 (2) (2010)
Camilo Quintáns, Antonio Colmenar, Manuel Castro, María José Moure, Enrique Mandado
A Methodology to Teach Advanced A/D Converters, Combining Digital Signal Processing and Microelectronics Perspectives. IEEE Trans. Educ. 53 (3) (2010)
Juan J. Rodríguez-Andina, María José Moure, María Dolores Valdés
Features, Design Tools, and Application Domains of FPGAs. IEEE Trans. Ind. Electron. 54 (4) (2007)
Camilo Quintáns, María José Moure, María Dolores Valdés, Enrique Mandado
A virtual instrumentation laboratory based on a reconfigurable coprocessor. IEEE Trans. Instrum. Meas. 55 (2) (2006)
María José Moure, María Dolores Valdés, Pablo Rodiz, Loreto Rodríguez-Pardo, José Fariña Rodríguez
An FPGA-Based System on Chip for the Measurement of QCM Sensors Resolution. FPL (2006)
María Dolores Valdés, María José Moure, Camilo Quintáns, Bruno Perez, Enrique Mandado
A FPGA Learning System combining Hardware and Software Tools. VIRTUAL-LAB (2004)
María Dolores Valdés, Miguel A. Domínguez, María José Moure, Camilo Quintáns
A Reconfigurable Communication Processor Compatible with Different Industrial Fieldbuses. FPL (2004)
Miguel A. Domínguez, María Dolores Valdés, María José Moure
Implementation of a Device Compatible with Different Fieldbuses Using Reconfigurable Circuits. ICINCO (3) (2004)
María Dolores Valdés, María José Moure, Camilo Quintáns, Enrique Mandado
A Data Acquisition Reconfigurable Coprocessor for Virtual Instrumentation Applications. FPL (2003)
G. Lías, María Dolores Valdés, Miguel A. Domínguez, María José Moure
Implementing a Fieldbus Interface Using an FPGA. FPL (2000)
María José Moure, María Dolores Valdés, Enrique Mandado, Angel Salaverría
Educational Application of Virtual Instruments Based on Reconfigurable Logic. MSE (1999)
María Dolores Valdés, María José Moure, Enrique Mandado, Angel Salaverría
An Alternative Solution for Reconfigurable Coprocessors Hardware and Interface Synthesis. FPL (1999)
María José Moure, María Dolores Valdés, Enrique Mandado
Virtual Instruments Based on Reconfigurable Logic. FPL (1998)
María Dolores Valdés, María José Moure, L. Rodríguez, Enrique Mandado
Reducing the designing time of configurable interfaces oriented to control applications. ICECS (1998)
Loreto Rodríguez-Pardo, María José Moure, María Dolores Valdés, Enrique Mandado
A computer assisted learning tool for electronic design training. ICECS (1998)
María Dolores Valdés, María José Moure, Loreto Rodríguez-Pardo, J. Álvarez, E. Mandalo
Using hypermedia for programmable logic devices education. MSE (1997)
María Dolores Valdés, María José Moure, L. Rodríguez, A. del Río
Interactive Practical Teaching of Digital Circuits Design by Means of Field Programmable Gate Arrays. CALISCE (1996)