M. S. Bhat

Publication Activity (10 Years)

Years Active: 2005-2024
Publications (10 Years): 13

Top Topics

Image Deblurring

Top Venues

J. Low Power Electron.

Publications

Ramachandra Gambheer, M. S. Bhat
Optimized Compressed Sensing for IoT: Advanced Algorithms for Efficient Sparse Signal Reconstruction in Edge Devices. IEEE Access 12 (2024)
Ramachandra Gambheer, M. S. Bhat
CCD Sensor Based Cameras for Sustainable Streaming IoT Applications With Compressed Sensing. IEEE Access 11 (2023)
Sreenivasulu Polineni, S. Rekha, M. S. Bhat
A fully differential switched-capacitor integrator based programmable resolution hybrid ADC architecture for biomedical applications. IET Circuits Devices Syst. 15 (2) (2021)
G. Hanumantha Rao, Sreenivasulu Polineni, S. Rekha, M. S. Bhat
A 0.3-V, 2.4-nW, and 100-Hz fourth-order LPF for ECG signal processing. Int. J. Circuit Theory Appl. 48 (11) (2020)
Sreenivasulu Polineni, M. S. Bhat, S. Rekha
A Switched Capacitor-Based SAR ADC Employing a Passive Reference Charge Sharing and Charge Accumulation Technique. Circuits Syst. Signal Process. 39 (11) (2020)
Samarth Bonthala, Yashas Uppoor, Ashika Nayak, Sreenivasulu Polineni, M. S. Bhat
Design of High Resolution Delta Sigma Modulator in 180 nm CMOS technology. ISED (2019)
Sreenivasulu Polineni, G. Hanumanta Rao, S. Rekha, M. S. Bhat
A 0.3 V, 56 dB DR, 100 Hz fourth order low-pass filter for ECG acquisition system. Microelectron. J. 94 (2019)
E. S. Shajahan, M. S. Bhat
High Isolation Single Pole Four Throw RF MEMS Switches for X band. ISED (2018)
E. S. Shajahan, M. S. Bhat
Fabrication and characterisation of RF MEMS capacitive switches tuned for X and Ku bands. Int. J. Mechatronics Autom. 6 (2/3) (2018)
Baldeo Sharan Sharma, M. S. Bhat
Design of high performance dual-gate nano-scale In0.55Ga0.45 as transistor with modified substrate geometry. UEMCON (2017)
B. Jhnanesh Somayaji, M. S. Bhat
Triple Reduced Surface Field Drain Extended MOS Device Design and Its RF Performance Evaluation for Sub-Micron RF SoC Platform. J. Low Power Electron. 13 (4) (2017)
B. Jhnanesh Somayaji, M. S. Bhat
Analysis of implant parameters in high voltage TRIPLE RESURF LDMOS for advanced SoC applications. ISED (2016)
Suraj Hebbar, Vinay Kumar, M. S. Bhat, Navakanta Bhat
Smart handheld platform for electrochemical bio sensors. VDAT (2016)
D. N. Jagadish, M. S. Bhat
Low Energy and Area Efficient Nonbinary Capacitor Array Based Successive Approximation Register Analog-to-Digital Converter. J. Low Power Electron. 11 (3) (2015)
A. A. Bini, M. S. Bhat
A nonlinear level set model for image deblurring and denoising. Vis. Comput. 30 (3) (2014)
A. A. Bini, M. S. Bhat
Despeckling low SNR, low contrast ultrasound images via anisotropic level set diffusion. Multidimens. Syst. Signal Process. 25 (1) (2014)
E. S. Shajahan, M. S. Bhat, B. Chenna Reddy
Inductive Tuned High Isolation RF MEMS Capacitive Shunt Switches. ISED (2014)
Sadeque Reza Khan, Rajsekhar Kr. Nath, M. S. Bhat
GSM and GUI Based Remote Data Logging System. ISED (2014)
D. N. Jagadish, M. S. Bhat
Low Energy and Area Efficient Nonbinary Capacitor Array Based SAR ADC. ISED (2014)
B. Chenna Reddy, E. S. Shajahan, M. S. Bhat
Design of a triple band-notched circular monopole antenna for UWB applications. WOCN (2014)
D. N. Jagadish, M. S. Bhat
A Low Voltage Inverter Based Differential Amplifier for Low Power Switched Capacitor Applications. ISED (2014)
R. Lagisetty, N. K. Philip, R. Padhi, M. S. Bhat
Object detection and obstacle avoidance for mobile robot using stereo camera. CCA (2013)
K. Soorya Krishna, M. S. Bhat
Minimization of Via-Induced Signal Reflection in On-Chip High Speed Interconnect Lines. Circuits Syst. Signal Process. 31 (2) (2012)
G. Rajashekar, M. S. Bhat
Design of resolution adaptive TIQ flash ADC using AMS 0.35 µm technology. Int. J. Inf. Commun. Technol. 2 (1/2) (2009)
M. S. Bhat, S. Rekha, H. S. Jamadagni
Extrinsic Analog Synthesis Using Piecewise Linear Current-Mode Circuits. VLSI Design (2006)
M. S. Bhat, S. Rekha, H. S. Jamadagni
An Extrinsic Method for the Synthesis of Analog Functions using Non-Linear Current-Mode Circuits. IICAI (2005)
M. S. Bhat, S. Rekha, H. S. Jamadagni
An Extrinsic Method of Evolutionary Synthesis of Multiple-Valued Arithmetic Functions using Genetic Algorithms. IICAI (2005)
M. S. Bhat, H. S. Jamadagni
Static power minimization in current-mode circuits. ASP-DAC (2005)
M. S. Bhat, H. S. Jamadagni
Power Optimization in Current Mode Circuits. VLSI Design (2005)