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Luis Andres Cardona
ORCID
Publication Activity (10 Years)
Years Active: 2011-2017
Publications (10 Years): 2
Top Topics
Node Selection
Hardware Implementation
High Speed
Dedicated Hardware
Top Venues
Int. J. Reconfigurable Comput.
J. Syst. Archit.
Microelectron. Reliab.
ICCST
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Publications
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Luis Andres Cardona
,
Anees Ullah
,
Luca Sterpone
,
Carles Ferrer
A novel tool-flow for zero-overhead cross-domain error resilient partially reconfigurable X-TMR for SRAM-based FPGAs.
J. Syst. Archit.
81 (2017)
Anees Ullah
,
Ernesto Sánchez
,
Luca Sterpone
,
Luis Andres Cardona
,
Carles Ferrer
An FPGA-based dynamically reconfigurable platform for emulation of permanent faults in ASICs.
Microelectron. Reliab.
75 (2017)
Luis Andres Cardona
,
Carles Ferrer
AC_ICAP: A Flexible High Speed ICAP Controller.
Int. J. Reconfigurable Comput.
2015 (2015)
Luis Andres Cardona
,
B. Lorente
,
Carles Ferrer
Partial crypto-reconfiguration of nodes based on FPGA for WSN.
ICCST
(2014)
Luis Andres Cardona
,
Jharna Agrawal
,
Yi Guo
,
Joan Oliver
,
Carles Ferrer
Performance-Area Improvement by Partial Reconfiguration for an Aerospace Remote Sensing Application.
ReConFig
(2011)