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Lian Zeng
Publication Activity (10 Years)
Years Active: 2014-2021
Publications (10 Years): 11
Top Topics
Coarse Grained
Helmholtz Stereopsis
Network On Chip
Protein Folding
Top Venues
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Inf. Media Technol.
IPSJ Trans. Syst. LSI Des. Methodol.
ISQED
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Publications
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Hao Chen
,
Sihao Huang
,
Lian Zeng
,
Cong Luo
,
Wulan Huang
,
Pan Liu
A New Model for Mining Superior Uploaders on Bilibili.
QRS Companion
(2021)
Qingdan Huang
,
Liqiang Pei
,
Yong Wang
,
Lian Zeng
AU Data Augmentation Method Based on Generative Adversarial Networks.
AIAM
(2020)
Qingdan Huang
,
Wenxiong Mo
,
Liqiang Pei
,
Lian Zeng
3D Coordinate Calculation and Pose Estimation of Power Meter based on Binocular Stereo Vision.
ICSCA
(2019)
Xin Jiang
,
Xiangyang Lei
,
Lian Zeng
,
Takahiro Watanabe
High performance virtual channel based fully adaptive thermal-aware routing for 3D NoC.
ISQED
(2017)
Xin Jiang
,
Xiangyang Lei
,
Lian Zeng
,
Takahiro Watanabe
High Performance Virtual Channel Based Fully Adaptive 3D NoC Routing for Congestion and Thermal Problem.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
(11) (2017)
Lian Zeng
,
Tieyuan Pan
,
Xin Jiang
,
Takahiro Watanabe
An Efficient Highly Adaptive and Deadlock-Free Routing Algorithm for 3D Network-on-Chip.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
(7) (2016)
Tieyuan Pan
,
Li Zhu
,
Lian Zeng
,
Takahiro Watanabe
,
Yasuhiro Takashima
An Online Task Placement Algorithm Based on MER Enumeration for Partially Reconfigurable Device.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
(7) (2016)
Tieyuan Pan
,
Lian Zeng
,
Yasuhiro Takashima
,
Takahiro Watanabe
A Fast MER Enumeration Algorithm for Online Task Placement on Reconfigurable FPGAs.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
(12) (2016)
Lian Zeng
,
Xin Jiang
,
Takahiro Watanabe
A Performance Enhanced Dual-switch Network-on-chip Architecture.
Inf. Media Technol.
10 (3) (2015)
Lian Zeng
,
Takahiro Watanabe
A performance enhanced dual-switch Network-on-Chip architecture.
ASP-DAC
(2015)
Lian Zeng
,
Xin Jiang
,
Takahiro Watanabe
A Performance Enhanced Dual-switch Network-on-chip Architecture.
IPSJ Trans. Syst. LSI Des. Methodol.
8 (2015)
Xin Jiang
,
Lian Zeng
,
Takahiro Watanabe
A Sophisticated Routing Algorithm in 3D NoC with Fixed TSVs for Low Energy and Latency.
Inf. Media Technol.
9 (4) (2014)
Xin Jiang
,
Lian Zeng
,
Takahiro Watanabe
A Sophisticated Routing Algorithm in 3D NoC with Fixed TSVs for Low Energy and Latency.
IPSJ Trans. Syst. LSI Des. Methodol.
7 (2014)