Leonardo Rezende Juracy

Publication Activity (10 Years)

Years Active: 2017-2023
Publications (10 Years): 15

Top Topics

Comprehensive Evaluation

Modeling Framework

Top Venues

IEEE Trans. Circuits Syst. I Regul. Pap.

IEEE Trans. Very Large Scale Integr. Syst.

Publications

Rafael Schild Reusch, Leonardo Rezende Juracy, Fernando Gehm Moraes
Deploying Machine Learning in Resource-Constrained Devices for Human Activity Recognition. SBESC (2023)
Leonardo Rezende Juracy, Rafael Garibotti, Fernando Gehm Moraes
From CNN to DNN Hardware Accelerators: A Survey on Design, Exploration, Simulation, and Frameworks. Found. Trends Electron. Des. Autom. 13 (4) (2023)
Leonardo Rezende Juracy, Alexandre M. Amory, Fernando Moraes
A Comprehensive Evaluation of Convolutional Hardware Accelerators. IEEE Trans. Circuits Syst. II Express Briefs 70 (3) (2023)
Rafael Schild Reusch, Leonardo Rezende Juracy, Fernando Gehm Moraes
Assessment and Optimization of 1D CNN Model for Human Activity Recognition. SBESC (2022)
Leonardo Rezende Juracy, Alexandre de Morais Amory, Fernando Gehm Moraes
A Fast, Accurate, and Comprehensive PPA Estimation of Convolutional Hardware Accelerators. IEEE Trans. Circuits Syst. I Regul. Pap. 69 (12) (2022)
Leonardo Rezende Juracy, Matheus T. Moreira, Alexandre M. Amory, Fernando Gehm Moraes
A TensorFlow and System Simulator Integration Approach to Estimate Hardware Metrics of Convolution Accelerators. LASCAS (2021)
Leonardo Rezende Juracy, Matheus Trevisan Moreira, Alexandre de Morais Amory, Alexandre F. Hampel, Fernando Gehm Moraes
A High-Level Modeling Framework for Estimating Hardware Metrics of CNN Accelerators. IEEE Trans. Circuits Syst. I Regul. Pap. 68 (11) (2021)
Felipe A. Kuentzer, Leonardo Rezende Juracy, Matheus T. Moreira, Alexandre M. Amory
Test Oriented Design and Layout Generation of an Asynchronous Controller for the Blade Template. ASYNC (2020)
Leonardo Rezende Juracy, Matheus Trevisan Moreira, Alexandre de Morais Amory, Fernando Gehm Moraes
A Survey of Aging Monitors and Reconfiguration Techniques. CoRR (2020)
Leonardo Rezende Juracy, Matheus T. Moreira, Felipe A. Kuentzer, Alexandre M. Amory
A DfT Insertion Methodology to Scannable Q-Flop Elements. IEEE Trans. Very Large Scale Integr. Syst. 26 (8) (2018)
Felipe A. Kuentzer, Leonardo Rezende Juracy, Matheus T. Moreira, Alexandre M. Amory
Testable Error Detection Logic Design Applied to an Asynchronous Timing Resilient Template. SBCCI (2018)
Leonardo Rezende Juracy, Matheus T. Moreira, Felipe A. Kuentzer, Fernando Gehm Moraes, Alexandre M. Amory
An LSSD Compliant Scan Cell for Flip-Flops. ISCAS (2018)
Felipe A. Kuentzer, Leonardo Rezende Juracy, Alexandre M. Amory
On the reuse of timing resilient architecture for testing path delay faults in critical paths. DATE (2018)
Leonardo Rezende Juracy, Felipe B. Lazzarotto, Daniel V. Pigatto, Ney Laert Vilar Calazans, Fernando Gehm Moraes
XGT4: An industrial grade, open source tester for multi-gigabit networks. ICECS (2017)
Leonardo Rezende Juracy, Matheus Trevisan Moreira, Felipe Augusto Kuentzer, Alexandre de Morais Amory
Optimized Design of an LSSD Scan Cell. IEEE Trans. Very Large Scale Integr. Syst. 25 (2) (2017)